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SI21662-B22-GM/R PDF预览

SI21662-B22-GM/R

更新时间: 2024-11-15 21:14:15
品牌 Logo 应用领域
芯科 - SILICON 电信电信集成电路
页数 文件大小 规格书
2页 158K
描述
Telecom Circuit, 1-Func, QFN-68

SI21662-B22-GM/R 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:QFN-68Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.67
JESD-30 代码:S-XQCC-N68功能数量:1
端子数量:68最高工作温度:75 °C
最低工作温度:-10 °C封装主体材料:UNSPECIFIED
封装代码:HQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG标称供电电压:1.2 V
表面贴装:YES电信集成电路类型:TELECOM CIRCUIT
温度等级:COMMERCIAL EXTENDED端子形式:NO LEAD
端子位置:QUADBase Number Matches:1

SI21662-B22-GM/R 数据手册

 浏览型号SI21662-B22-GM/R的Datasheet PDF文件第2页 
Si21662-B22  
Dual DVB-S/S2 Digital TV Demodulator  
Description  
Features  
The Si21662-B integrates two separate high performance  
DVB-S, DVB-S2 and DSS digital demodulators into a single  
compact package for satellite TV standards. Leveraging  
Silicon Labs' proven digital demodulation architecture, each  
embedded demodulator achieves excellent reception  
performance for each standard while significantly minimizing  
front-end design complexity and cost. Connecting the  
- DVB-S2 (ETSI EN 302 307 and TR102-376)  
-
-
-
QPSK/8PSK demodulator and FEC decoder  
Broadcast profile CCM, 64800 bits frame, single TS  
1 to 45 MSymbol/s  
TM  
-
DIRECTV AMC compatible  
- DVB-S (ETSI EN 300 421) and DSS supported  
- QPSK demodulator and enhanced FEC decoder  
- 1 to 45 MSymbol/s  
Si21662-B to  
a
dual satellite tuner, results in  
a
high-performance and cost optimized TV front-end solution.  
- Dual DiSEqC™ 2.x interface, Unicable support  
The satellite demodulation functionality allows demodulating  
widely deployed DVB-S, DIRECTV™ (DSS) legacy  
standards, and DVB-S2 (AMC compliant) satellite broadcasts.  
A zero-IF interface allows for a seamless connection to  
market proven satellite silicon tuners.  
2
- I C serial bus interfaces (master and host)  
- Dual independent differential ZIF I/Q inputs  
- GPIOs and multi-purpose ports (two per demodulator)  
- Firmware control for upgradeability  
- Separate flexible TS interfaces with serial or parallel  
outputs  
Constant  
Coding  
Modulation  
(CCM),  
QPSK/8PSK  
demodulation schemes and broadcast profile are the main  
specifications of the DVB-S2 demodulator. Silicon Labs'  
innovative LDPC and BCH decoding architecture delivers  
best-in-class reception while exhibiting low power dissipation.  
The Si21662-B offers an on-chip blind scanning algorithm for  
DVB-S/S2 standards. It also integrates two DiSEqC™ 2.0  
LNB interfaces for satellite dish control and, for each satellite  
demodulator, an equalizer to compensate for echoes in long  
cable feeds from the LNB to the satellite tuner RF input.  
The Si21662-B embeds two independent programmable  
transport stream interfaces which provide a flexible range of  
output modes and are fully compatible with all MPEG  
decoders or conditional access modules to support any  
customer application.  
- Fast lock times for all standards  
- Only two power supplies: 1.2 and 3.3 V  
- 8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant  
- Pin-to-pin compatible with all dual demodulator family:  
Si216x2  
- API compatible with all single and dual demodulator   
families  
Applications  
- Multi-receiver iDTV: on-board or in a NIM  
- Advanced multimedia PVR STBs  
- PC-TV accessories  
- PVR, DVD, and Blu-Ray disc recorders  
1.2, 3.3V RESETB  
MP_A_A  
MP_C_A  
Si21662B  
GPIO1/TS_ERR_A  
TS_VAL_A  
S_ADC_IP_A  
ADC_A  
ADC_A  
S_ADC_IN_A  
S_ADC_QP_A  
S_ADC_QN_A  
TS_SYNC_A  
TS_CLK_A  
TS_DATA_A  
DEMODULATOR_A CORE  
8
Dual Satellite  
Tuner  
ADDR_A  
DiSEqC_OUT_A  
DiSEqC_CMD  
I2C Block_A  
DiSEqC_A  
DiSEqC_IN_A_B  
SDA_MAST  
SDA_HOST  
SCL_HOST  
SCL_MAST  
XO  
XTAL_I/CLK_IN  
CLK_IN/OUT  
DiSEqC_OUT_B  
ADDR_B  
DiSEqC_B  
I2C Block_B  
GPIO0/TS_ERR_B  
S_ADC_IP_B  
S_ADC_IN_B  
S_ADC_QP_B  
S_ADC_QN_B  
TS_VAL_B  
TS_SYNC_B  
TS_CLK_B  
ADC_B  
ADC_B  
DEMODULATOR_B CORE  
TS_DATA_B  
8
MP_B_B  
MP_D_B  
Dual Digital Demodulators  
Copyright © 2015 by Silicon Laboratories  
10.29.2015  

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