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SI1000-C

更新时间: 2024-11-18 12:46:59
品牌 Logo 应用领域
芯科 - SILICON /
页数 文件大小 规格书
1页 37K
描述
Typical sleep mode current 0.1 A retains state and RAM contents over full supply range fast wakeup of 2 s

SI1000-C 数据手册

  
Si1000-C  
Ultra-Low Power 64 kB, 10-bit ADC  
MCU with Integrated 240–960 MHz Transceiver  
Supply Voltage: 1.8 to 3.6 V  
Transceiver Features  
-
Typical sleep mode current < 0.1 µA; retains state and RAM  
contents over full supply range; fast wakeup of < 2 µs  
Two built-in brown-out detectors cover sleep and active modes  
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-
-
-
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Frequency range = 240–960 MHz  
Sensitivity = –121 dBm  
-
FSK, GFSK, and OOK modulation  
Max output power = +20 dBm  
RF power consumption  
10-Bit Analog to Digital Converter  
-
-
-
-
-
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Up to 300 ksps  
- 18.5 mA receive  
Up to 18 external inputs  
- 85 mA @ +20 dBm transmit  
Data rate = 0.123 to 256 kbps  
Auto-frequency calibration (AFC)  
Antenna diversity and transmit/receive switch control  
Programmable packet handler  
TX and RX 64 byte FIFOs  
External pin or internal VREF (no external capacitor required)  
Built-in temperature sensor (±3 °C); no calibration required  
External conversion start input option  
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-
-
-
-
-
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Autonomous burst mode with 16-bit automatic averaging  
accumulator  
Frequency hopping capability  
On-chip crystal tuning  
Dual Comparators  
-
-
-
Programmable hysteresis and response time  
Configurable as interrupt or reset source  
Low current (< 0.5 µA)  
Digital Peripherals  
-
-
22 port I/O  
Hardware enhanced UART, SPI and I2C serial ports available  
concurrently  
Memory  
-
64 kB bytes Flash; in-system programmable in 1024-byte   
sectors; full read/write/erase functionality over the entire  
supply range  
-
-
Low power 32-bit smaRTClock  
Four general purpose 16-bit counter/timers; six channel   
programmable counter array (PCA)  
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4352 bytes internal data RAM (256 + 4K)  
Clock Sources  
On-Chip Debug  
-
Precision internal oscillators: 24.5 MHz with ±2% accuracy sup-  
ports UART operation; spread-spectrum mode for reduced EMI  
Low power 20 MHz internal oscillator  
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On-chip debug circuitry facilitates full speed, non-intrusive in-  
system debug (no emulator required)  
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-
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High-Speed 8051 µC Core  
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External oscillator: crystal, RC, C, CMOS clock  
Pipe-lined instruction architecture; executes 70% of instructions  
in 1 or 2 system clocks  
smaRTClock oscillator: 32.768 kHz crystal or self-oscillate  
Ordering Part Number  
-
25 MIPS peak throughput with 25 MHz clock  
-
Si1000-C-GM, 42-pin QFN 5 x 7 mm2  
Development Kit: Si1000DK  
CIP-51 8051  
Controller Core  
Analog Peripherals  
XCVR  
(240-960 MHz)  
Power On  
Reset/PMU  
6-bit  
Wake  
Reset  
64k Byte ISP Flash  
Program Memory  
IREF0  
IREF  
PA  
TX  
External  
VREF  
Internal  
VREF  
256 Byte SRAM  
4096 Byte XRAM  
Debug /  
C2CK/RST  
AGC  
LNA  
VDD  
VREF  
Programming  
Hardware  
RXp  
RXn  
A
M
U
X
10-bit  
Temp  
Sensor  
300ksps  
ADC  
C2D  
Mixer  
PGA  
ADC  
CRC  
Engine  
GND  
VDD  
GND  
VREG  
CP0, CP0A  
CP1, CP1A  
+
SYSCLK  
-
+
-
Comparators  
Digital Peripherals  
Transceiver Control Interface  
SFR  
Bus  
Digital  
Modem  
Precision  
24.5 MHz  
Oscillator  
Delta  
Sigma  
Modulator  
Low Power  
20 MHz  
Oscillator  
Digital  
Logic  
UART  
External  
Oscillator  
Circuit  
XTAL1  
XTAL2  
XIN  
XOUT  
Timers 0,  
1, 2, 3  
OSC  
Priority  
Crossbar  
Decoder  
WDT  
PCA/  
XTAL3  
XTAL4  
smaRTClock  
Oscillator  
SMBus  
SPI 0  
22  
ANALOG &  
DIGITAL I/O  
System Clock  
Configuration  
Port I/O  
Config  
Wireless MCU  
Copyright © 2010 by Silicon Laboratories  
1.15.10  

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