120V Boot, 4A Peak, High Frequency
High-side and Low-side Driver
SGM48211
PIN DESCRIPTION
PIN
NAME
I/O
FUNCTION
Positive Supply of the Whole Driver. A decoupling capacitor in the range of 0.22µF to 4.7µF is
connected between VDD and VSS pins. (1)
1
VDD
P
High-side Bootstrap Supply. A bootstrap capacitor in the range of 0.022µF to 0.1µF is
connected between HB and HS pins. The capacitor value varies with total gate charge of
external MOSFET, the switching speed, as well as the voltage ripple criteria.
2
HB
P
3
4
5
6
7
8
HO
HS
HI
O
P
I
Output of the High-side Driver. Connect this pin to the gate of the high-side MOSFET.
Reference Ground of the High-side Output Stage. Tie this pin directly to the source of external
high-side power MOSFET.
Input of the High-side Driver. (2)
LI
I
Input of the Low-side Driver. (2)
VSS
LO
—
—
O
—
Reference Ground of the Device.
Output of the Low-side Driver. Connect this pin to the gate of the low-side MOSFET.
Exposed
Pad (3)
Thermal Pad. Connect directly to VSS with a large wide trace or polygon copper to achieve
improved thermal conduction.
NOTES:
1. It is recommended to use the upper capacitance range for low temperature consideration.
2. Capacitors with typical value of 1nF to 10nF are recommended to be placed between HI/LI and VSS pins, which will be a great
help to filter noise presented on these pins.
3. The exposed pad is internally connected to the substrate for thermal conduction and should be connected to the ground
outside.
SG Micro Corp
www.sg-micro.com
DECEMBER 2023
4