Crystal oscillator
PROGRAMMABLE HIGH-FREQUENCY CRYSTAL OSCILLATOR
SG-8002CE series
Product number (please refer to page 2)
Q 3 3 2 1 C E x x x x x x 0 0
• Wide frequency output by PLL technology.
• Short lead mass production time.
• Excellent shock resistance and environmental capability.
_____
• Output enable function (OE) and stand-by function (ST) can be used for low
current consumption applications.
• Available for lead (Pb)-free soldering.
• Complete lead (Pb)-free product.
Actual size
SG-Writer available to purchase.
Please contact EPSON or local sales representative.
Specifications (characteristics)
Specifications ∗2
Item
Symbol
Remarks
PT / ST
PH / SH
PC / SC
Output frequency range
f0
1.0000 MHz to 125.0000 MHz
-0.5 V to +7.0 V
Refer to page 50. “Frequency range”
Max. supply voltage VDD-GND
Power source
voltage
Operating voltage
Storage temperature
Operating temperature
VDD
TSTG
TOPR
Δf/f0
Iop
5.0 V ±0.5 V
-40 ˚C to +125 ˚C
-20 ˚C to +70 ˚C (-40 ˚C to +85 ˚C)
3.3 ± 0.3 V
2.7 V to 3.6 V : fo ≤ 66.7 MHz (PC / SC)
Stored as bare product after unpacking
Refer to page 50. “Frequency range”
B, C : -20 ˚C to +70 ˚C, M : -40 ˚C to +85 ˚C
No load condition, Max. frequency range
Temperature
range
-40 ˚C to +85 ˚C
Frequency stability
B: ±50 x 10-6 C: ± 100 x 10-6 M: ±100 x 10-6 ∗3
Current consumption
40 mA Max.
30 mA Max.
28 mA Max.
Output disable current
Standby current
IOE
16 mA Max.
OE = GND (PT, PH, PC)
____
IST
50 µA Max.
ST = GND (ST, SH, SC)
CMOS load: 1/2 VDD level
TTL load: 1.4 V level
–
40 % to 60 %
–
Duty
∗1
tw/ t
40 % to 60 %
High output voltage
Low output voltage
VOH
VOL
N
VDD -0.4 V Min.
0.4 V Max.
IOH = -16 mA (PT / ST, PH / SH),-8 mA (PC / SC)
IOL = 16 mA (PT / ST, PH / SH), 8 mA (PC / SC)
TTL
5 TTL Max.
–
Output load ∗1
condition (fan out)
Max. frequency and Max. operating voltage range
CMOS
CL
15 pF Max.
VIH
VIL
2.0 V Min.
0.8 V Max.
0.7 VDD Min.
0.2 VDD Max.
4 ns Max.
Output enable / disable input voltage
S___T_, OE terminal
CMOS level
Output rise time ∗1
TTL level
–
3 ns Max.
3 ns Max.
CMOS load: 20 % → 80 % VDD
TTL load: 0.4 V → 2.4 V
tR
tF
4 ns Max.
–
–
–
CMOS level
Output fall time ∗1
TTL level
4 ns Max.
CMOS load: 80 % → 20 % VDD
TTL load: 2.4 V → 0.4 V
4 ns Max.
Oscillation start up time
Aging
tOSC
10 ms Max.
±5 x 10-6 / year Max.
Time at minimum operating voltage to be 0 s
Ta = +25 ˚C, VDD = 5.0 V / 3.3 V, First year
fa
∗1 Operating temperature (-40 ˚C to +85 ˚C), the available frequency, duty and output load conditions, please refer to page 50, 51.
∗2 PLL-PLL connection & Jitter specification, please refer to page 52.
∗3 PT / ST and PH / SH for “M” stability will be available up to 27 MHz.
External dimensions
(Unit: mm)
Recommended soldering pattern
(Unit: mm)
2.2
# 4
# 3
#3
#2
#4
2.4
NO. Pin terminal
1
2
3
4
OE or ST
GND
#1
OUT
VDD
# 2
# 1
0.9
3.2±0.2
Note.
OE Pin (PT, PH, PC)
OE pin - "H" or "open" : Specified frequency output.
OE pin - "L" : Output is high impedance.
1.4
ST pin (ST, SH, SC)
ST pin - "H" or "open" : Specified frequency output.
ST pin - "L" : Output is low level (weak pull - down), oscillation stops.
44