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SG6741SY

更新时间： 2024-10-28 13:13:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 301K
描述
Highly-Integrated Green-Mode PWM Controller, 8LD, SOIC,JEDEC MS-012, .150" NARROW BODY, 2500/TAPE REEL

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SG6741SY 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：8
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：5.72
模拟集成电路 - 其他类型：SWITCHING CONTROLLER控制模式：CURRENT-MODE
控制技术：PULSE WIDTH MODULATION最大输入电压：22 V
最小输入电压：11 V标称输入电压：15 V
JESD-30 代码：R-PDSO-G8长度：4.9 mm
湿度敏感等级：1功能数量：1
端子数量：8最高工作温度：105 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.75 mm
表面贴装：YES切换器配置：SINGLE
最大切换频率：68 kHz技术：BICMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.9 mm
Base Number Matches：1

SG6741SY 数据手册

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www.fairchildsemi.com  
AN-6741  
Flyback Power Supply Control with the SG6741  
Summary  
Description  
This application note describes a design strategy for a high-  
The highly integrated SG6741 series of PWM controllers  
provides several features to enhance the performance of  
flyback converters.  
efficiency,  
compact  
flyback  
converter.  
Design  
considerations, mathematical equations, and guidelines for a  
printed circuit board layout are presented.  
To minimize standby power consumption, a proprietary  
green mode provides off-time modulation to linearly  
decrease the switching frequency at light-load conditions.  
To avoid acoustic-noise problems, the minimum PWM  
frequency is set above 22KHz. This green mode enables the  
power supply to meet international power conservation  
requirements. With the internal high-voltage startup  
circuitry, the power loss due to bleeding resistors is also  
eliminated. To further reduce power consumption, the  
SG6741 is manufactured using BiCMOS process, which  
allows an operating current of only 4mA.  
Features  
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High-voltage startup  
Low operating current: 4mA  
Linearly decreasing PWM frequency to 22KHz  
Frequency hopping to reduce EMI emission  
Peak-current-mode control  
Cycle-by-cycle current limiting  
Leading-edge blanking  
Synchronized slope compensation  
Gate output maximum voltage clamp: 18V  
The SG6741 integrates an internal frequency hopping  
function to reduce the EMI emission of a power supply with  
minimal line filtering; while the built-in synchronized slope  
compensation maintains a stable peak-current-mode control.  
The proprietary internal line compensation ensures constant  
output power limit over a wide AC input voltages, from  
V
V
DD over-voltage protection (OVP)  
DD under-voltage lockout (UVLO)  
Internal open-loop protection  
Constant power limit (full AC input range)  
90VAC to 264VAC  
.
The SG6741 provides many protection functions. In  
addition to cycle-by-cycle current limiting, the internal  
open-loop protection circuit ensures safety should an open-  
loop or output short-circuit failure occur. The PWM output  
is disabled until the voltage drops below the UVLO lower  
limit, then the controller starts again. As long as VDD  
exceeds about 26V, the internal OVP circuit is triggered.  
© 2006 Fairchild Semiconductor Corporation  
Rev. 1.2.1 • 10/20/08  
www.fairchildsemi.com  
12345678

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