SE4120S
GNSS Receiver IC
Applications
Product Description
The SE4120S is a highly-integrated GNSS radio front
end IC offering high performance and low power
operation in a wide range of low-cost applications. It
supports GPS and dual-mode L1-band GPS/Galileo
Dual-mode GPS and Galileo receivers
Software-defined GNSS radio systems
High sensitivity / low power GNSS / A-GNSS apps.
Portable navigation devices, mobile phones, and
GNSS peripheral devices
products.
The SE4120S features a conditioned
interface for software implementations of GNSS
baseband signal processing.
Telematics equipment
Features
The SE4120S includes an on-chip LNA, a low IF
receiver with a linear AGC and an advanced multi-bit
I/Q analog to digital converter (ADC) with serialized
data output. The receiver incorporates a fully integrated
image reject mixer, obviating the need for a SAW filter
in many applications. The SE4120S’s on-chip IF filter
may be adjusted from 2.2 MHz BW (for GPS only) to
4.4MHz BW (for simultaneous reception of Galileo and
GPS signals). The digitized I/Q output, centered near-
zero IF, is available in a serialized data stream to
facilitate software signal processing.
Single conversion L1-band GPS/Galileo radio with
integrated IF filter
2-bit serialized digital I/Q output at near-zero IF
Integrated LNA with high-gain (18.5 dB typ.) and
low NF (1.65 dB typ.)
Very low 2.15 dB typ. RF system noise figure
Low 10 mA operating current with 2.7-3.6 V supply;
8 mA with internal LNA disabled
Low standby current 3 μA typical
Fully integrated VCO and resonator
The highly-integrated PLL synthesizer of the SE4120S
requires only two passive components to implement an
off-chip loop filter.
Integrated PLL supporting 16.368 MHz reference
frequency
I/O supply range extends down to 1.7 V
The SE4120S is optimized for the lowest possible
power consumption consistent with a very low external
component count.
2.2 x 2.2 x 0.35 mm, 46 pad, 250um pitch, SnAg
solder bump, RoHS-compliant package
Ordering Information
The SE4120S incorporates current-controlled low-
spurious output buffers which may be run from a
separate external supply to interface to low voltage
systems. Output buffers supply sufficient current to
drive most baseband devices directly.
Part No.
Package
Remark
46-Pad Chip-Scale Shipped in Tape
SE4120S-R
Package
& Reel
Functional Block Diagram
Optional
filter
MIX_IN
LNA_OUT
VAGC
AGC_DIS
AGC
Controller
IF Filter
-45°
DATA_OUT
SYNC
~
~
~
ADC
Buffer
Data
Downconverter /
Serializer
LNA
+45°
FILT_BW
I
Q
CLK_OUT
Sample
Clock
LNA_IN
divider
Quadrature
÷2
FILT_BW
Fs_SEL1
Fs_SEL0
Feedback
Divider
VCO
~
Chip
Control
SE4120
RX_EN
Phase/Frequency
Detector
Reference
Divider
OSC_EN
Reference
Oscillator
/ Buffer
RVI
~
VTUNE
PLL Loop
Filter
XTAL1/
TCXO IN
XTAL2
DST-00118 Rev 4.3 May-26-2009
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