TMS370Cx5x
8-BIT MICROCONTROLLER
SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997
FN/FZ PACKAGE
(TOP VIEW)
CMOS/EEPROM/EPROM Technologies on a
Single Device
– Mask-ROM Devices for High-Volume
Production
– One-Time-Programmable (OTP) EPROM
Devices for Low-Volume Production
– Reprogrammable EPROM Devices for
Prototyping Purposes
9
8
7
6
5
4
3
2
1
6867 66 65 6463 62 61
60
C3 10
D1 / CSH3
11
12
13
14
15
16
59
58
57
56
55
54
C4
C5
C6
D2 / CSH2
D3 / SYSCLK
D4 / R / W
C7
D5 / CSPF
V
D6/CSH1/EDS
D7/CSE1/WAIT
RESET
CC2
Internal System Memory Configurations
– On-Chip Program Memory Versions
– ROM: 4K to 48K Bytes
V
SS2
A0 17
53
52
51
50
49
48
47
18
19
20
21
22
23
A1
A2
A3
A4
A5
A6
A7
INT1
INT2
INT3
SPISOMI
SPISIMO
– EPROM: 16K to 48K Bytes
– ROM-less
SPICLK
T1IC/CR
T1PWM
T1EVT
24
25
26
46
45
44
– Data EEPROM: 256 or 512 Bytes
– Static RAM: 256 to 3.5K Bytes
– External Memory/Peripheral Wait States
– Precoded External Chip-Select Outputs
in Microcomputer Mode
T2AEVT
T2AIC2/PWM
27 28 2930 31 32 3334 35 3637 38 39 4041 42 43
Flexible Operating Features
JN/NM PACKAGE
(TOP VIEW)
– Low-Power Modes: STANDBY and HALT
– Commercial, Industrial, and Automotive
Temperature Ranges
B5
B6
B7
C0
MC
C1
C2
B4
B3
B2
B1
B0
1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
2
3
– Clock Options
4
– Divide-by-4 (0.5 MHz – 5 MHz SYSCLK)
– Divide-by-1 (2 MHz – 5 MHz SYSCLK)
Phase-Locked Loop (PLL)
5
D0 / CSE2 / OCF
6
V
V
7
SS1
CC1
V
SS1
C3
8
D1 / CSH3
D3 / SYSCLK
D4 / R / W
D6 / CSH1 / EDS
D7 / CSE1 / WAIT
RESET
9
– Supply Voltage (V ): 5 V ± 10%
C4
C5
C6
C7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
CC
Eight-Channel 8-Bit Analog-to-Digital
Converter 1 (ADC1)
AN0
A0
A1
INT1
Two 16-Bit General-Purpose Timers
On-Chip 24-Bit Watchdog Timer
INT2
A2
INT3
A3
SPISOMI
SPISIMO
SPICLK
A4
Two Communication Modules
– Serial Communications Interface 1 (SCI1)
– Serial Peripheral Interface (SPI)
A5
A6
T1IC / CR
T1PWM
A7
T2AEVT
T2AIC2 / PWM
T2AIC1 / CR
SCICLK
SCIRXD
SCITXD
XTAL2 / CLKIN
XTAL1
AN7
T1EVT
Flexible Interrupt Handling
TMS370 Series Compatibility
V
SS1
AN6
AN5
AN4
AN3
AN2
AN1
CMOS/Package /TTL-Compatible I/O Pins
– 64-Pin Plastic and Ceramic Shrink
Dual-In-Line Packages/44 Bidirectional,
9 Input Pins
– 68-Pin Plastic and Ceramic Leaded Chip
Carrier Packages/46 Bidirectional,
9 Input Pins
V
V
CC1
CC3
V
SS3
Workstation/PC-Based Development
System
– C Compiler and C Source Debugger
– Real-Time In-Circuit Emulation
– Extensive Breakpoint/Trace Capability
– Software Performance Analysis
– Multi-Window User Interface
– Microcontroller Programmer
– All Peripheral Function Pins Are
Software Configurable for Digital I/O
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443