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SCANH162602SM/NOPB PDF预览

SCANH162602SM/NOPB

更新时间： 2024-02-15 04:28:57
品牌 Logo 应用领域
德州仪器 - TI 驱动接口集成电路驱动器
页数 文件大小 规格书
12页 156K
描述
16 LINE TRANSCEIVER, PBGA64, BGA-64

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SCANH162602SM/NOPB 技术参数

是否Rohs认证：符合生命周期：Obsolete
包装说明：LFBGA,Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
差分输出：NO驱动器位数：16
输入特性：STANDARD接口集成电路类型：LINE TRANSCEIVER
接口标准：IEEE 1149.1JESD-30 代码：S-PBGA-B64
JESD-609代码：e1长度：8 mm
湿度敏感等级：4功能数量：16
端子数量：64最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装形状：SQUARE
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified最大接收延迟：6 ns
接收器位数：16座面最大高度：1.5 mm
最大供电电压：3.6 V最小供电电压：2.7 V
标称供电电压：3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
最大传输延迟：6 ns宽度：8 mm
Base Number Matches：1

SCANH162602SM/NOPB 数据手册

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OBSOLETE  
SCAN16602  
www.ti.com  
SNLS162C –MAY 2003–REVISED APRIL 2013  
Function Table for B to A Data Flow(1)  
Inputs  
Outputs  
OEBA  
LEBA  
CLKBA  
B
X
L
A
(2)  
H
H
H
H
H
L
L
L
L
↑
A0  
L
H
L
L
↑
H
L
H
H
X
X
X
X
H
X
H
Z
(1) H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial (HIGH or LOW, inputs may not float)  
Z = High Impedance  
(2) Output level before the indicated steady-state input conditions were  
established.  
Functional Description  
In the normal mode, these devices are 16-bit universal bus transceivers that combine D-type latches and D-type  
flip-flops to allow data flow in transparent, latched, or clocked modes. They can be used as two 8-bit  
transceivers, or as one 16-bit transceiver. The test circuitry can be activated by the TAP to take snapshot  
samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating  
the TAP may affect the normal functional operation of the universal bus transceivers. When the TAP is activated,  
the test circuitry performs boundary-scan test operations according to the protocol described in IEEE Std 1149.1-  
1990.  
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),  
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when  
LEAB is high. When LEAB is low, the A data is latched while CLKAB is held at a static low or high logic level.  
Otherwise, if LEAB is low, A data is stored on a low-to-high transition of CLKAB. When OEAB is LOW, the B  
outputs are active. When OEAB is HIGH, the B outputs are in the high-impedance state. B-to-A data flow is  
similar to A-to-B data flow but uses the OEBA, LEBA, and CLKBA inputs. The output enables are complimentary  
to facilitate the use of a single R/W signal without additional logic.  
Five dedicated test pins are used to observe and control the operation of the test circuitry: test data input (TDI),  
test data output (TDO), test mode select (TMS), test clock (TCK), and test reset (TRST). All testing and scan  
operations are synchronized to the TAP interface.  
For details about the sequence of boundary scan cells in the SCAN16602, please refer to the BSDL (Boundary  
Scan Description Language) file available on our website at http://www.ti.com/lsds/ti/analog/interface.page.  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Copyright © 2003–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Links: SCAN16602  
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