Datasheet > S7986-01_09

S7986-01_09

更新时间： 2022-11-06 11:42:14

品牌	Logo	应用领域
HAMAMATSU		传感器图像传感器电视
页数	文件大小	规格书
8页	203K
描述
CCD area image sensor Back-thinned FT-CCD for low-light-level NTSC B/W TV application

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数据手册

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S7986-01_09 数据手册

CCD area image sensor S7986-01, S7987-01

ꢀꢀDimensional outlines (unit: mm)

S7986-01

S7987-01

Window 12.0*

Active area 6.860

Index mark

2.54 ± 0.13

44.0 ± 0.44

2.54 ± 0.13

44.0 ± 0.44

52.0

60.0 ± 0.3

1st pin index mark

Photosensitive surface

1st pin index mark

(24 ×) 0.5 ± 0.05

* Size of window that guarantees the transmittance in the

“Spectral transmittance characteristics of window material” graph.

* Size of window that guarantees the transmittance in the

“Spectral transmittance characteristics of window material” graph.

KMPDA0103EB

KMPDA0104EB

ꢀꢀPin connections

no.

S7986-01

Function

Reset drain

Output transistor source

Output transistor drain

Output gate

S7987-01

Function

Remark

(standard operation)

Symbol

RD Reset drain

+12 V

Output transistor source

Output transistor drain

Output gate

RL=2.2 kΩ

+15 V

+3 V

Summing gate

Same timing as P2H

P2H

P1H

IG2H

IG1H

ISH

CCD horizontal register clock-2

CCD horizontal register clock-1

Test point (horizontal input gate-2)

Test point (horizontal input gate-1)

Test point (horizontal input source)

Transfer gate

P2H

P1H

IG2H

IG1H

ISH

CCD horizontal register clock-2

CCD horizontal register clock-1

Test point (horizontal input gate-2) -8 V

Test point (horizontal input gate-1) -8 V

Test point (horizontal input source) Shorted to RD

Transfer gate

Same timing as P2VS*¹⁵

CCD vertical register clock-2

(storage area)

CCD vertical register clock-1

(storage area)

CCD vertical register clock-2

(storage area)

CCD vertical register clock-1

(storage area)

P2VS

P1VS

P2VS

P1VS

Th1

Th2

P-

P+

Thermistor

TE-cooler-

TE-cooler+

Substrate (GND)

CCD vertical register clock-2

(image area)

CCD vertical register clock-1

(image area)

Substrate (GND)

CCD vertical register clock-2

(image area)

CCD vertical register clock-1

(image area)

GND

P2VI

P1VI

P2VI

P1VI

Reset gate

*15: TG is an isolation gate between vertical register and horizontal resister.

In standard operation, the same pulse of P2VS should be applied to the TG.

1...3 4 567 8

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S7987-01	HAMAMATSU	CCD area image sensor Back-thinned FT-CCD for low-light-level NTSC B/W TV application	获取价格
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