Datasheet > S4806CBI

S4806CBI

更新时间： 2024-11-09 03:34:19

品牌	Logo	应用领域
其他 - ETC		异步传输模式 ATM
页数	文件大小	规格书
4页	61K
描述
STS-48/STM-16 SONET/SDH Framer and ATM/POS Mapper

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S4806CBI 数据手册

Part Number - S4806CBI

Product Brief Version 1.3 - April 2001

ADVANCED PRODUCT BRIEF

Ohio

STS-48/STM-16 SONET/SDH Framer and ATM/POS Mapper

Features

• Provides two SONET/SDH line interface modes of operation:

single STS-48/STM-16 or quad STS-12/STM-4s.

• Alternatively, this TDM port can be used to support protection-

switching configurations between two OHIO devices or two

fiber optics modules.

• Processes any valid combination of SONET/SDH STS-48c/

AU-4-16c, STS-12c/AU-4-4c, STS-3c/AU-4, or STS-1/AU-3

tributaries within an STS-48/STM-16 or STS-12/STM-4.

• This 4x622MHz APS/TDM drop/add interface supports both

synchronous and asynchronous operation.

• Terminates/generates SONET/SDH section, line, and

optionally path overhead. SONET/SDH processing of all

defined TOH/POH bytes, compliant with Bellcore GR-253 and

ANSI T1.105, and ITU G.751, G.783, G.804.

• Built-in 144x48 cross-connect capability in the TX direction.

Supports ring architectures such as add-drop, drop and

continue, and hairpinning, as well as APS.

• Provides a four bit 622 MHz line interface on the SONET/SDH

side for STS-48/STM-16 applications; four serial 622 MHz

signal for STS-12/STM-4 applications

• Performs full-duplex mapping ATM cells or packets for up to

48 payload tributaries. These tributaries can range in size

from STS-48c/AU-4-16c down to STS-1/AU-3.

• Supports independent loop timing in quad STS-12/STM-4 line

configuration

• Supports full-duplex mapping of ATM cells or packets into

DS3 tributaries for ATM over DS3 or packet over DS3 applica-

tions. DS3 tributaries are then mapped into either STS-1s or

STM-1s via AU-3.

• Provides a 100 MHz 32-bit Flexbus-3^TMsystem interface;

supports Utopia Level 3 mode for ATM applications; for packet

operation, can be provisionned either in extended Utopia-3

mode or in OIF SPI-3 mode.

• ATM mapping is compliant with the ATM Forum UNI 3.1 speci-

fication and ITU-T I.432.1 and I.432.2.

• Programmable Utopia/FlexBus-3^TMaddresses for multi-PHY

operation.

• POS mapping is compliant with IETF RFC 2615.

• Supports simultaneously ATM, POS, TDM and direct-mapped

traffic on a per tributary basis.

• Loopback capability for SONET/SDH, ATM and POS

tributaries

• Provides a single 4x622 MHz telecom bus type system

interface for add/drop of payload tributaries containing TDM

traffic. This interface includes a 144x48 STS-1 level cross-

connect for grooming of TDM tributaries.

• Packaged in 624 pin CBGA

• 0.18um CMOS, 1.8V core and 2.5V I/O supply

S4806CBI Block Diagram

TX_ERR

TX_EOP

TX_LBYTE[1:0]

TX_SYS_DAT[31:0]

MICROPROCESSOR I/F

GPIO REG

TOH INSERT

TX_PRTY

TX_SOC/P

STPA

TX_CLK

TX_ADR[5:0]

DS3

PTR

FRMR

HDLC

SPE/VC

GEN

PROC

FIFO

MAP

TX_DATA_OUT_[3:0]

TX_CLK_OUT_[1:4]

ATM

x48

DXC

x48

TX_ENB

TX_CLAV/PA[1:4]

TX_CLK_OUT

RX_SYS_DAT[31:0]

RX_PRTY

POH

MON

TOH

MON

DS3

DMAP

PTR

FRMR

SRPA

HDLC

ATM

PROC

RX_DATA_IN_[3:0]

RX_CLK_IN_[1:4]

SEL

RX_SOC/P

RX_CLK

RX_ADR[5:0]

RX_ENB

FIFO

x48

TOH DROP

DS3

PTR PROC

PROT FRMR

RX_CLAV[1:4]

PROT DXC

PROT TOH GEN

JTAG PORT

RX_CLK_OUT

RX_LBYTE[1:0]

RX_EOP

RX_LOSEXT[1:4]

RX_ERR

Advanced Information - The information contained in this

document is about a product in its definition phase and is sub-

ject to change without notice at any time. All features described

herein are design goals.Contact AMCC for updates to this doc-

ument and the latest product status.

AMCC - Confidential and Proprietary

200 Minuteman Park, Andover, MA 01810 Ph: 978/623-0009 Fax:978/623-0024

12 3 4

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