defining a degree of excellence
5 TAP LEADING EDGE CONTROL
LOW VOLTAGE DELAY MODULES
-
Cat 30 R2
.20 Typ
.20 Typ
12 4 10 6 8
.375
.350
(
)
bel DC
(
)
bel DC
.285 Max
.285 Max
.325
(
)
(
)
P/N
P/N
Vcc 14
In 1
Gnd 7
*
.30
.20
.10
.30
.20
.10
.80 Max
.80 Max
.015
.004
4o
.20 Max
.015 Min
.23 Max
.12 Min
.22 Max
.012
.008
.012
.008
.018
100o
90o
.030
+
Coplanarity .002
.018
.045
Test Conditions @ 25oC
Part Numbers
Total
Delay
Delay
per Tap
Rise
Time
Ein
Pulse Voltage
Rise Time
Pulse Width
Pulse Period
Supply Current
Supply Voltage
3.0 Volts
SMD
Thru-Hole
Trin
PW
PP
Iccl
Vcc
3.0 ns (10%-90%)
1.2 x Total Delay
4 x Pulse Width
25 ma Typical
3.3 Volts
S477-0025-02 A477-0025-02
S477-0030-02 A477-0030-02
S477-0040-02 A477-0040-02
S477-0050-02 A477-0050-02
S477-0060-02 A477-0060-02
S477-0070-02 A477-0070-02
S477-0080-02 A477-0080-02
S477-0090-02 A477-0090-02
25 ns
30 ns
40 ns
50 ns
60 ns
70 ns
80 ns
90 ns
5 ns
3 ns
6 ns
8 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
10 ns
12 ns
14 ns
16 ns
18 ns
20 ns
25 ns
Electrical Characteristics
Min.
3.0
Max. Units
3.6
Vcc Supply Voltage
V
V
V
ma
ma
ma
V
Vih Logic 1 Input Voltage
Vil Logic 0 Input Voltage
Iik Input Clamp Current
Ioh Logic 1 Output Current
Iol Logic 0 Output Current
Voh Logic 1 Output Voltage
Vol Logic 0 Output voltage
Vik Input Clamp Voltage
Iih Logic 1 Input Current
2.4
0.8
-20
20
S477-0100-02 A477-0100-02 100 ns
S477-0125-02 A477-0125-02 125 ns
-20
S477-0150-02 A477-0150-02 150 ns
S477-0200-02 A477-0200-02 200 ns
S477-0250-02 A477-0250-02 250 ns
30 ns
40 ns
50 ns
3 ns
3 ns
3 ns
2.9
0.1
-0.5
1
V
V
ua
ua
ma
ma
C
%
%
O
Tolerances
Iil
Logic 0 Input Current
-1
+
Input to Taps 2 ns or 5 % , Whichever is Greater
Tap to Tap 2 ns or 7%, Whichever is Greater
Delays measured @ 50% levels on Leading Edge only
with no loads on Taps
Rise and Fall Times measured from 10% to 90% levels
Icch Logic 1 Supply Current
Iccl Logic 0 Supply Current
Ta Operating Free Air Temperature
PW Min. Input Pulse Width of Total Delay
d
10
30
70o
+
0o
40
Maximum Duty Cycle
50
(
)
(
)
Drive Capabilities
Tc Temp. Coeff. of Total Delay TD 100 + 25000/TD PPM/ C
Nh Logic 1 Fanout
Nl Logic 0 Fanout
-
-
10 LSTTL Loads Max.
10 LSTTL Loads Max.
Notes
Transfer molded for better reliability
Compatible with TTL & CMOS circuits
Recommended Temperature Profile
Terminals: Electro-Tin plate phosphor bronze
Performance warranty is limited to specified parameters listed
SMD - Tape & Reel available:
300o C
Infra Red
225o C Max Temp.
200o C
100o C
> 185o C
32mm Wide x 16mm Pitch, 500 pieces per 13" reel
for 90 Seconds Max
Other Delays and Tolerances Available
Consult Sales
0
2
4
6
8
Time in Minutes
Specifications subject to change without notice.
Corporate Office
Bel Fuse Inc.
198 Van Vorst Street, Jersey City, NJ 07302-4496
Tel: 201-432-0463
Fax: 201-432-9542
E-Mail: Belfuse@compuserve.com
Internet: http://www.belfuse.com
Far East Office
Bel Fuse Ltd.
8F/8 Luk Hop Street
San Po Kong
Kowloon, Hong Kong
Tel: 852-2328-5515
Fax: 852-2352-3706
European Office
Bel Fuse Europe Ltd.
Preston Technology Management Centre
Marsh Lane, Preston PR1 8UD
Lancashire, U.K.
Tel: 44-1772-556601
Fax: 44-1772-888366
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