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S1C33L17 PDF预览

S1C33L17

更新时间: 2024-11-21 12:33:31
品牌 Logo 应用领域
爱普生 - EPSON 控制器
页数 文件大小 规格书
8页 269K
描述
CMOS 32-bit Application Specific Controller

S1C33L17 数据手册

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S1C33L17  
CMOS 32-bit Application Specific Controller  
32-bit RISC CPU-Core Optimized for SoC (EPSON S1C33 PE)  
Dual AMBA Bus System for CPU and LCDC  
Built-in PLL (Multiplication rate: ×1 to ×16)  
Advanced CPU Instruction Queue Buffer  
Built-in 8KB RAM  
SDRAM Controller with Burst Control  
Generic DMA Controller (HSDMA/IDMA)  
4-ch. PWM Control Timer/Counter  
Supports Several Interfaces  
SIO with FIFO (IrDA1.0, ISO7816-3), SPI, I2S and USB  
5-ch. ADC for Analog Input  
Built-in LCD Controller with 12KB IVRAM  
Supports Up to QVGA (320 × 240) Display in 1 bpp Mode  
(black and white) by Single Chip  
Supports UMA VRAM  
Supports VGA (640 × 480) and 64K Color  
NAND Flash Interface  
Provides 32-bit MAC API  
DESCRIPTIONS  
The S1C33L17 is a high cost performance 32-bit RISC controller for specific applications that require a lot of  
general-purpose I/O, a powerful PWM Timer/Counter function, several serial interfaces including USB-FS device  
controller, an ADC and a LCD display system, such as middle range electronic dictionaries and educational products  
with voice/music playback function. The S1C33L17 consists of a 32-bit RISC CPU-Core, generic DMA controller,  
USB-FS device controller, PWM control Timer/Counter, several interfaces (SIO including IrDA1.0 and ISO7816-3  
protocol, SPI and I2S), ADC, RAM/Shared IVRAM, RTC and NAND Flash interface implemented by EPSON SoC design  
technology using 0.18 µm Mixed Analog Low CMOS Process.  
FEATURES  
Technology  
• 0.18 µm AL-4-Layers mixed analog low power CMOS process technology  
CPU  
• EPSON original C33 PE 32-bit RISC CPU-Core with AMBA bus optimized for SoC  
• Max. 66 MHz operation  
• Internal 2-stage pipeline and 4 instruction queues  
• Instruction set: 128 instructions (16-bit fixed length)  
• Basic instructions are compatible with the S1C33 32-bit RISC Cores.  
• Dual AMBA bus system for CPU and LCDC  
Internal Memories  
• 8KB RAM  
• 12KB IVRAM (used as general-purpose RAM, VRAM)  
• 2KB DST RAM (used as general-purpose RAM or IDMA descriptor table RAM)  
Oscillator Circuit / PLL  
OSC3 Oscillator Circuit  
• Crystal oscillation: 5 MHz min. to 48 MHz max.  
• Ceramic oscillation: 5 MHz min. to 48 MHz max.  
• External clock input: 5 MHz min. to 48 MHz max  
A 48 MHz clock source with 0.25% of accuracy should be connected for using the USB function.  
When using a ceramic resonator, please be sure to contact Murata Manufacturing Co., Ltd. for further information on  
conditions of use for ceramic resonators.  
SEIKO EPSON CORPORATION  

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