RTL8305SC
Datasheet
7.6.
7.6.1.
PHY 5 REGISTERS .....................................................................................................................................................86
PHY 5 Register 0 for Port 4 MAC: Control..........................................................................................................86
PHY 5 Register 1 for Port 4 MAC: Status ............................................................................................................87
PHY 5 Register 2 for Port 4 MAC: PHY Identifier 1............................................................................................87
PHY 5 Register 3 for Port 4 MAC: PHY Identifier 2............................................................................................87
PHY 5 Register 4 for Port 4 MAC: Auto-Negotiation Advertisement...................................................................88
MII Port NWay Mode ...........................................................................................................................................89
MII Port Force Mode ...........................................................................................................................................89
7.6.2.
7.6.3.
7.6.4.
7.6.5.
7.6.6.
7.6.7.
8. FUNCTIONAL DESCRIPTION.......................................................................................................................................90
8.1.
8.1.1.
SWITCH CORE FUNCTIONAL OVERVIEW.....................................................................................................................90
Applications..........................................................................................................................................................90
Port 4....................................................................................................................................................................90
Port Status Configuration.....................................................................................................................................94
Flow Control ........................................................................................................................................................95
Address Search, Learning, and Aging ..................................................................................................................97
Address Direct Mapping Mode.............................................................................................................................97
Half Duplex Operation.........................................................................................................................................98
InterFrame Gap....................................................................................................................................................98
Illegal Frame........................................................................................................................................................98
8.1.2.
8.1.3.
8.1.4.
8.1.5.
8.1.6.
8.1.7.
8.1.8.
8.1.9.
8.1.10. Dual MII Interface................................................................................................................................................99
8.2.
PHYSICAL LAYER FUNCTIONAL OVERVIEW..............................................................................................................110
Auto-Negotiation for UTP ..................................................................................................................................110
10Base-T Transmit Function ..............................................................................................................................110
10Base-T Receive Function................................................................................................................................ 111
Link Monitor....................................................................................................................................................... 111
100Base-TX Transmit Function.......................................................................................................................... 111
100Base-TX Receive Function............................................................................................................................ 111
100Base-FX........................................................................................................................................................ 111
100Base-FX Transmit Function..........................................................................................................................112
100Base-FX Receive Function ...........................................................................................................................112
8.2.1.
8.2.2.
8.2.3.
8.2.4.
8.2.5.
8.2.6.
8.2.7.
8.2.8.
8.2.9.
8.2.10. 100Base-FX FEFI ..............................................................................................................................................112
8.2.11. Reduced Fiber Interface.....................................................................................................................................113
8.2.12. Power Saving Mode............................................................................................................................................113
8.2.13. Reg0.11 Power-Down Mode...............................................................................................................................114
8.2.14. Crossover Detection and Auto Correction..........................................................................................................114
8.2.15. Polarity Detection and Correction .....................................................................................................................114
8.3.
ADVANCED FUNCTIONAL OVERVIEW .......................................................................................................................115
Reset ...................................................................................................................................................................115
Setup and Configuration.....................................................................................................................................116
Serial EEPROM Example: 24LC02....................................................................................................................117
SMI .....................................................................................................................................................................119
Head-Of-Line Blocking ......................................................................................................................................119
Port-Based VLAN ...............................................................................................................................................119
IEEE 802.1Q Tagged-VID Based VLAN.............................................................................................................121
Port VID (PVID).................................................................................................................................................122
Lookup Table Access...........................................................................................................................................123
8.3.1.
8.3.2.
8.3.3.
8.3.4.
8.3.5.
8.3.6.
8.3.7.
8.3.8.
8.3.9.
8.3.10. QoS Function......................................................................................................................................................123
8.3.11. Insert/Remove VLAN Tag....................................................................................................................................125
8.3.12. Filtering/Forwarding Reserved Control Frame .................................................................................................125
8.3.13. Broadcast Storm Control....................................................................................................................................126
8.3.14. Broadcast In/Out Drop.......................................................................................................................................126
8.3.15. Loop Detection ...................................................................................................................................................127
8.3.16. MAC Local Loopback Return to External ..........................................................................................................128
8.3.17. Reg.0.14 PHY Digital Loopback Return to Internal...........................................................................................129
5-port 10/100Mbps Single-Chip Dual MII Switch Controller
vii
Track ID: JATR-1076-21 Rev. 1.2
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