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RC82545GM PDF预览

RC82545GM

更新时间: 2024-11-25 20:54:59
品牌 Logo 应用领域
英特尔 - INTEL 时钟局域网数据传输PC外围集成电路
页数 文件大小 规格书
54页 267K
描述
LAN Controller, 1 Channel(s), 125MBps, CMOS, PBGA364, 21 X 21 MM, 1 MM PITCH, BGA-364

RC82545GM 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:LBGA, BGA364,20X20,40针数:364
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.81其他特性:ALSO REQUIRES 2.5V AND 3.3V SUPPLIES
地址总线宽度:64边界扫描:YES
总线兼容性:PCI最大时钟频率:25 MHz
最大数据传输速率:125 MBps外部数据总线宽度:64
JESD-30 代码:S-PBGA-B364JESD-609代码:e0
长度:21 mm低功率模式:YES
串行 I/O 数:1端子数量:364
最高工作温度:55 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LBGA
封装等效代码:BGA364,20X20,40封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE峰值回流温度(摄氏度):240
电源:1.5,2.5,3.3 V认证状态:Not Qualified
座面最大高度:1.7 mm子类别:Serial IO/Communication Controllers
最大供电电压:1.57 V最小供电电压:1.43 V
标称供电电压:1.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:21 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, LANBase Number Matches:1

RC82545GM 数据手册

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82545GM Gigabit Ethernet Controller  
Networking Silicon  
Datasheet  
Product Features  
PCI/PCI-X  
PHY ability to automatically detect  
polarity and cable lengths and MDI  
versus MDI-X cable at all speeds  
PCI-X Revision 1.0a support for  
frequencies up to 133 MHz  
Host Offloading  
Multi-function PCI device  
Transmit and receive IP, TCP and UDP  
checksum off-loading capabilities  
PCI Revision 2.3 support for 32-bit wide  
or 64-bit wide interface at 33 MHz and  
66 MHz  
Transmit TCP segmentation  
MAC  
IEEE 802.1q VLAN support with  
VLAN tag insertion, stripping and  
packet filtering for up to 4096 VLAN  
tags  
IEEE 802.3x compliant flow control  
support with software controllable pause  
times and threshold values  
Advanced packet filtering  
Manageability  
Programmable host memory receive  
buffers (256 Bytes to 16 Kbytes) and  
cache line size (16 Bytes to 256 Bytes)  
Manageability features on both ports:  
SMB port, ASF 1.0, ACPI, Wake on  
LAN, and PXE  
Wide, optimized internal data path  
architecture (128 bits)  
64 Kbyte configurable Transmit and  
Receive FIFO buffers  
Compliance with PCI Power  
Management 1.1 and ACPI 2.0 register  
set compliant  
Optimized descriptor fetching and write-  
back mechanisms  
Four activity and link indication outputs that  
directly drive LEDs  
Lead-freea 364-pin Ball Grid Array (BGA).  
Devices that are lead-free are marked with  
a circled “e1” and have the product code:  
PCxxxxxx.  
PHY  
Integrated PHY for 10/100/1000 Mbps  
full and half duplex operation  
IEEE 802.3ab Auto-Negotiation support  
IEEE 802.3ab PHY compliance and  
compatibility  
a. This device is lead-free. That is, lead has not been intentionally added, but lead may still exist as an impurity at <1000 ppm.  
The Material Declaration Data Sheet, which includes lead impurity levels and the concentration of other Restriction on Haz-  
ardous Substances (RoHS)-banned materials, is available at:  
ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks  
In addition, this device has been tested and conforms to the same parametric specifications as previous versions of the de-  
vice. For more information regarding lead-free products from Intel Corporation, contact your Intel Field Sales representative.  
322559-001  
Revision 2.2  
August 2009  

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