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R5107G301A-TR-FE

更新时间： 2024-11-09 20:43:59
品牌 Logo 应用领域
理光 - RICOH 光电二极管
页数 文件大小 规格书
2页 258K
描述
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO8, SSOP-8

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R5107G301A-TR-FE 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SSOP-8针数：8
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.57
其他特性：DETECTOR THRESHOLD VOLTAGE IS 3V可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：2.9 mm
湿度敏感等级：1信道数量：1
功能数量：1端子数量：8
最高工作温度：105 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260座面最大高度：1.3 mm
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：0.9 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：11
宽度：2.8 mmBase Number Matches：1

R5107G301A-TR-FE 数据手册

 浏览型号R5107G301A-TR-FE的Datasheet PDF文件第2页 
R5107G Series  
Watchdog Timer Equipped with Manual Reset with VD  
The R5107G Series are CMOS-based system power ICs with a voltage detector (VD) and watchdog timer (WDT) integrated in a single chip.  
R5107G monitors the power system of devices equipped with microprocessors and prevents system runaway with a reset signal when a  
malfunction occurs. The output delay time of the VD and watchdog timeout period/reset time can be adjusted by an external capacitor with  
a high degree of accuracy. The R5107G is equipped with the function that inhibits clock monitoring of the WDT (INH) and manual reset (MR)  
that also stops the VD.  
FEATURES  
• Supply Current (ISS) ························Typ. 11μA (VDD=-VDET+0.5V,  
Clock pulse input)  
• Operating Voltage Range (VDD) ······0.9V to 6.0V  
(VD Section)  
• Output Delay Time (tPLH)·················Typ. 370ms (CD=0.1μF)  
• Output Delay Time Accuracy··········± 16% (-40°C ≤ Topt ≤ 105°C)  
(WDT Section)  
• Watchdog Timeout Period(tWD)·······Typ. 310ms (CTW=0.1μF)  
• Reset Hold Time of WDT(tWR)·········Typ. 34ms (CTW=0.1μF)  
•
•
•
Detector Threshold Range (-VDET)···1.5V to 5.5V (internally fixed)  
Detector Threshold Accuracy ··········± 1%  
Temp. coeff. of Detector Threshold ···Typ. ± 100ppm/°C  
• Watchdog Timeout Period Accuracy ····± 33% (-40°C ≤ Topt ≤ 105°C)  
• Package··········································SSOP-8G  
°
°
°
(The above shows specification at Topt=25 C. Design assurance value at -40 C ≤ Topt ≤ 105 C is also available. For details, please refer to the datasheet.)  
BLOCK DIAGRAMS  
TYPICAL APPLICATION  
R5107Gxx1A  
(Nch. open drain output)  
MR  
R5107Gxx1C  
(CMOS output)  
MR  
Power Supply  
Microprocessor  
VDD  
VDD  
VDD  
R
8
6
2
3
RESETB  
R5107Gxx1A  
1
5
VDD  
INH  
MR  
CD  
RESET  
I/O  
C
D
CD  
Vref2  
Vref1  
Vref2  
Vref1  
Series  
SCK  
GND  
SCK  
GND  
SCK  
CTW  
CTW  
WATCHDOG  
TIMER  
CLOCK  
DETECTOR  
WATCHDOG  
TIMER  
CLOCK  
DETECTOR  
SW SW  
CTW  
7
GND  
4
CTW  
CD  
RESETB  
INH  
INH  
RESETB  
SELECTION GUIDE  
TIMING CHART  
Halogen Free  
Package  
Q'ty per Reel  
Part No.  
+VDET  
VDD  
-VDET  
SSOP-8G  
3,000 pcs R5107G  
.
xx.  
1.  
∗-TR-FE  
.
xx : Specify the detector threshold within the range of  
1.5V (  
.
15  
.
)
to 5.5V  
(.  
55  
.
) in 0.1V steps.  
VINH  
: Select the output type from (  
.
A
.
) Nch. open drain or (  
.
C
.
) CMOS.  
.
∗
PACKAGE (Top View)  
VMR  
SSOP-8G  
8
7 6 5  
tPHL  
tPHL  
tPLH  
tPLH  
+VTCD  
VCD  
-VTCD  
tWDI  
tWD  
tWD  
Vref2H  
VCTW  
1
2
3
4
1
2
RESETB Output pin for Reset "L" signal  
Vref2L  
MR  
Manual reset pin  
tWR  
tWR  
Ext. Cap. pin for setting output  
delay time of VD  
3
CD  
VSCK  
4
5
6
GND  
SCK  
INH  
Ground pin  
Watchdog timer clock input pin  
Inhibit pin  
Ext. Cap. pin for setting reset and  
watchdog timeout period of WDT  
Power supply pin  
tMR  
tPLH  
VRESETB  
7
8
CTW  
VDD  
∗VTCD  
: Threshold voltage of CD pin when a power-on reset pulse inverting.  
∗Vref2H : CTW pin voltage at the end of WDT timeout period.  
∗Vref2L : CTW pin voltage at the begin of WDT timeout period.  
∗tPHL : Output delay time  
APPLICATION  
• Monitoring of the power system of devices equipped with microprocessors  
∗tWDI : tWD/10 (SCK pulses input during this period are ignored.)  
No.EK-170-111001  
CMOS Microprocessor Supervisory  
12

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