R380EX DATA SHEET
H I G H - I N T E G R AT I O N I N T E L ® 3 8 6 P C - C O M PAT I B L E SY ST E M C O N T R O L L E R
W I T H S U P P O R T F O R E D O D R A M , I S A B U S A N D P O W E R M A N A G E M E N T
The power management capabilities of the
R380EX include clock source switching,
halt detection, SMI event generation, and a
programmable clock restart delay to ensure
clock frequency settling when restarting the
oscillator from a powerdown state. The clock
source for the Intel386EX processor can be
switched between the R380EX CLK2OSC
input and the 32.768KHz real time clock
oscillator, thereby reducing the system power
consumption.
PRODUCT OVERVIEW
The RadiSys R380EX Embedded System
Controller is a member of the RadiSys family
of embedded core logic specifically designed
to support the Intel386EX processor. Providing
the necessary circuitry for a PC-compatible
embedded system design, it supplies a
simple, low-cost, “glueless” interface to
additional chips like a video controller or a
PCMCIA controller.
FEATURE SUMMARY
• Supports Intel386EX CPU
• True single-chip ISA implementation
• DRAM controller, 512KB to 64MB
• Flash SIMM controller
• Integrated real-time clock
• Enhanced IDE interface
• Keyboard and mouse controller
• Power management
• Supports Intel386EX chip DMA
• Four programmable I/O chip selects
• 16-bit digital I/O port plus 6-bit output port
• Supports local bus implementation
• ROM or flash ROM interface
• Speaker interface
The functional design of the R380EX is
directly derived from PC architecture.
The R380EX has 4 user-programmable I/O
chip selects in addition to the Intel386EX
processor’s chip selects. There are 16 bits
of individually programmable digital I/O
along with 6 bits of digital output. Additional
functional blocks handle the Intel386EX
processor halt and shutdown cycles, and
control the speaker and external LEDs. The
main and alternate functions of many of the
pins are controlled through registers within
the R380EX.
The R380EX includes a DRAM controller,
keyboard/mouse controller, real time clock,
enhanced IDE interface, and ISAbus controller.
The DRAM controller is compatible with both
fast-page-mode (FPM) and extended-data-out
(EDO) DRAM. It can be configured to support
both DRAM SIMMs and flash SIMMs for
greater system flexibility. The enhanced IDE
interface supports a maximum transfer rate
of 8.33MB per second. The ISAbus controller
has a separate data bus, and manages the
ISA signals to ensure a “quiet” bus for cycles
not directed to the ISA address space.
• Test mode
• 5V or 3.3V operation
• SMI support
• BIOS shadowing
• 208-pin PQFP
• Reference design available
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