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R2A20166SA PDF预览

R2A20166SA

更新时间: 2024-11-22 01:19:35
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
9页 353K
描述
8-bit 6ch D/A Converter with Buffer Amplifiers

R2A20166SA 数据手册

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New Product  
R2A20166NP/SA  
8-bit 6ch D/A Converter with Buffer Amplifiers  
R03DS0018EJ0100  
Rev.1.00  
2011.09.05  
Description  
The R2A20166 is an integrated circuit semiconductor of CMOS structure with 6 channels of built in D/A  
unnecessary and enabling configuration of a system with few component parts.  
Serial data transfer type input can easily be used through a combination of three lines: DI, CLK, and LD.  
Outputs incorporate buffer op-amps that have a drive capacity of 1 mA or above for both sink source, and  
can operate over the entire voltage range from almost ground to Vcc ( 0 to 5V ), making peripheral elements  
unnecessary and enabling configuration of a system with few component parts.  
Very small QFN package is added to lineup. It is suitable for a small mounting and reduces the mounting area.  
Features  
Guarantee Nonlinearity error : +/-1.0LSB, Differential nonlinearity error : +/-0.7LSB  
Data transfer format: 12-bit serial data input type by 3 wire ( DI, SCK, LD )  
Output buffer op-amps: Operable over entire voltage range from almost ground to Vcc ( 0 to 5V )  
Very small size package line-up: QFN-16(pin pitch: 0.5mm), TSSOP-16 (pin pitch 0.65mm)  
Application  
Conversion from digital data to analog control data for home-use and industrial equipment.  
Signal gain control or automatic adjustment of LCD-TV, PDP-TV or LCD display-monitor.  
Blurring correction control or various control of the interchangeable lens of digital still camera.  
Automatic adjustment by combination with microcomputer and EEPROM.  
(substitution of half fixed resistance)  
Block Diagram  
Number for TSSOP package  
Number for QFN package  
4
3
2
1
DI  
12-bit shift register  
D0 D1 D2 D3 D4 D5 D6 D7  
DO  
LD  
15  
16  
1
2
D8 D9 D10 D11  
CLK  
Channel decoder  
16  
14  
Vcc  
1
2 3 4 5 6  
8
Power on  
reset  
6
1
6
8-bit latch  
8–bit latch  
8-bit upper  
8-bit upper  
Segment R-2R  
Segment R-2R  
8
GND  
6
12  
14  
10  
12  
11  
13  
7
3
5
4
6
9
13  
15  
11  
9
VrefU  
VrefL  
Ao2  
Ao3  
Ao4  
Ao5  
Ao6  
Ao1  
Page 1 of 8  
R03DS0018EJ0100 Rev.1.00  
2011.09.05  

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