Datasheet > R1Q2A3609ABG50RT0

R1Q2A3609ABG50RT0

更新时间： 2024-11-09 07:03:43

品牌	Logo	应用领域
瑞萨 - RENESAS		静态存储器
页数	文件大小	规格书
26页	339K
描述
36-Mbit QDR™II SRAM 2-word Burst

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

R1Q2A3609ABG50RT0 数据手册

浏览型号R1Q2A3609ABG50RT0的Datasheet PDF文件第2页

浏览型号R1Q2A3609ABG50RT0的Datasheet PDF文件第3页

浏览型号R1Q2A3609ABG50RT0的Datasheet PDF文件第4页

浏览型号R1Q2A3609ABG50RT0的Datasheet PDF文件第5页

浏览型号R1Q2A3609ABG50RT0的Datasheet PDF文件第6页

浏览型号R1Q2A3609ABG50RT0的Datasheet PDF文件第7页

R1Q2A3636B/R1Q2A3618B/R1Q2A3609B

36-Mbit QDR™II SRAM

2-word Burst

REJ03C0341-0003

Preliminary

Rev. 0.03

Apr. 11, 2008

Description

The R1Q2A3636B is a 1,048,576-word by 36-bit, the R1Q2A3618B is a 2,097,152-word by 18-bit, and the

R1Q2A3609B is a 4,194,304-word by 9-bit synchronous quad data rate static RAM fabricated with advanced CMOS

technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a

burst counter. All input registers controlled by an input clock pair (K and /K) and are latched on the positive edge of K

and /K. These products are suitable for applications which require synchronous operation, high speed, low voltage, high

density and wide bit configuration. These products are packaged in 165-pin plastic FBGA package.

Features

•

1.8 V 0.1 V power supply for core (V_DD

1.4 V to V_DDpower supply for I/O (V_DDQ

DLL circuitry for wide output data valid window and future frequency scaling

Separate independent read and write data ports with concurrent transactions

100% bus utilization DDR read and write operation

Two-tick burst for low DDR transaction size

)

Two input clocks (K and /K) for precise DDR timing at clock rising edges only

Two output clocks (C and /C) for precise flight time and clock skew matching-clock and data delivered together to

receiving device

•

Internally self-timed write control

Clock-stop capability with µs restart

User programmable impedance output

Fast clock cycle time: 4.0 ns (250 MHz)/5.0 ns (200 MHz)/6.0 ns (167 MHz)

Simple control logic for easy depth expansion

JTAG boundary scan

Notes: QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress

Semiconductor, IDT, NEC, Samsung, and Renesas Technology Corp.

Preliminary:

The specifications of this device are subject to change without notice. Please contact your nearest

Renesas Technology's Sales Dept. regarding specifications.

REJ03C0341-0003 Rev.0.03 Apr. 11, 2008

Page 1 of 24

12 3 4 5 6 7...26

中文翻译

下载PDF

与R1Q2A3609ABG50RT0相关器件

型号	品牌	获取价格	描述	数据表
R1Q2A3609ABG-60R	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609ABG60RB0	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609ABG60RS0	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609ABG60RT0	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609B	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609BBG-40R	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609BBG-40RB	RENESAS	获取价格	4MX9 QDR SRAM, PBGA165, 15 X 17 MM, 1 MM PITCH, LEAD FREE, PLASTIC, LBGA-165
R1Q2A3609BBG-40RT	RENESAS	获取价格	暂无描述
R1Q2A3609BBG-50R	RENESAS	获取价格	36-Mbit QDR™II SRAM 2-word Burst
R1Q2A3609BBG-50RB	RENESAS	获取价格	暂无描述