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PTH12050YAZ PDF预览

PTH12050YAZ

更新时间: 2024-11-26 11:08:07
品牌 Logo 应用领域
德州仪器 - TI 双倍数据速率光电二极管输出元件电源电路存储
页数 文件大小 规格书
7页 266K
描述
6A 12V 输入非隔离式 DDR/QDR 存储器总线终端模块 | EUV | 6 | -40 to 85

PTH12050YAZ 技术参数

是否Rohs认证: 不符合生命周期:Active
零件包装代码:DIP包装说明:DMA,
针数:6Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8504.40.85.00
Factory Lead Time:1 week风险等级:0.85
其他特性:REMOTE SHUTDOWN模拟集成电路 - 其他类型:DC-DC REGULATED POWER SUPPLY MODULE
认证:UL, CSA控制模式:VOLTAGE-MODE
效率(主输出):84%高度:8.25 mm
最大输入电压:13.2 V最小输入电压:10.8 V
标称输入电压:12 VJESD-30 代码:R-PDMA-B6
JESD-609代码:e1长度:22.1 mm
功能数量:1输出次数:1
端子数量:6最高工作温度:85 °C
最低工作温度:-40 °C最大输出电流:8 A
最大输出电压:1.8 V最小输出电压:0.55 V
标称输出电压:1.25 V封装主体材料:PLASTIC/EPOXY
封装代码:DMA封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY峰值回流温度(摄氏度):260
保护:OUTPUT OVER CURRENT认证状态:Not Qualified
纹波电压(主输出):0.007 Vrms子类别:Power Supply Modules
表面贴装:YES最大切换频率:300 kHz
技术:HYBRID温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:3.175 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED最大总功率输出:10 W
微调/可调输出:YES宽度:12.57 mm
Base Number Matches:1

PTH12050YAZ 数据手册

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PTHxx050Y —Series  
6-A Non-Isolated DDR/QDR Memory  
Bus Termination Modules  
SLTS221 – MARCH 2004  
Features  
VTT Bus Termination Output  
Efficiencies up to 88 %  
50 W/in³ Power Density  
Output Over-Current Protection  
(Non-Latching, Auto-Reset)  
Safety Agency Approvals (Pending):  
UL/cUL60950, EN60950, VDE  
Point-of-Load Alliance (POLA)  
Compatible  
(Output Tracks the System VREF  
6 A Output Current (8 A Peak)  
3.3-V, 5-V or 12-V Input Voltage  
DDR & QDR Compatible  
)
On/Off Inhibit (for VTT Standby)  
Under-Voltage Lockout  
Operating Temp: –40 to +85 °C  
NOMINAL  
SIZE  
=0.87  
in  
x
0.5  
in  
(22,1 mm x 12,57 mm)  
Description  
Pin Configuration  
The PTHxx050Y are a series of ready-  
to-use switching regulator modules from  
Texas Instruments designed specifically for  
bus termination in DDR and QDR memory  
applications. Operating from either a 3.3-V,  
5-V or 12-V input, the modules generate  
a VTT output that will source or sink up  
to 6 A of current (8 A transient) to accu-  
rately track their VREF input. VTT is the  
required bus termination supply voltage,  
and VREF is the reference voltage for the  
memory and chipset bus receiver com-  
parators. VREF is usually set to half the  
VDDQ power supply voltage.  
output to provide state-of-the-art step-  
down switching conversion. The products  
are small in size (0.87 in × 0.5 in), and are  
an ideal choice where space, performance,  
and high efficiency are desired, along with  
the convenience of a ready-to-use module.  
Operating features include an on/off  
inhibit and output over-current protection  
(source mode only). The on/off inhibit  
feature allows the VTT bus to be turned  
off to save power in a standby mode of  
operation.  
Pin Function  
1
2
3
4
5
6
GND  
VREF  
VIN  
Inhibit *  
No Connect  
VTT  
*
Denotes negative logic:  
Open  
= VTT Output On  
Ground = VTT Output Off  
Package options include both through-  
hole and surface mount configurations.  
Both the PTHxx050Y series employs  
an actively switched synchronous rectifier  
Standard Application  
VIN  
VDDQ  
VREF  
1 k  
1 %  
VTT  
1
2
3
4
6
5
PTHxx050Y  
(Top View)  
1 k  
1 %  
Con  
hf-Ceramic  
Co1  
Low-ESR  
(Required)  
Co2  
Ceramic  
(Optional)  
CIN  
(Required)  
SSTL-2  
Data/  
Address  
Bus  
Q1  
BSS138  
(Optional)  
Standby  
GND  
C
= Required electrolytic capacitor; 220 µF (3.3-/5-V input), 560 µF (12-V input).  
in  
Co1 = Required low-ESR electrolyitic capacitor; 470 µF (3.3-/5-V input), 940 µF (12-V input).  
Co2 = Ceramic capacitance for optimum response to a 3-A ( 1.5-A) load transient.; 200 µF (3.3-/5-V input), 400 µF (12-V input).  
Con = Distributed hf-ceramic decoupling capacitors for VTT bus; as recommended for DDR memory appications.  
For technical support and further information, visit http://power.ti.com  

PTH12050YAZ 替代型号

型号 品牌 替代类型 描述 数据表
PTH12050YAS TI

完全替代

6A 12V 输入非隔离式 DDR/QDR 存储器总线终端模块 | EUV | 6 | -
PTH12050YAZT TI

完全替代

6A 12V 输入非隔离式 DDR/QDR 存储器总线终端模块 | EUV | 6 | -
PTH12050YAST TI

完全替代

6A 12V 输入非隔离式 DDR/QDR 存储器总线终端模块 | EUV | 6 | -

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