Datasheet > PPXD2020VMG116R

PPXD2020VMG116R

更新时间： 2022-04-07 12:02:34

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		微控制器
页数	文件大小	规格书
23页	119K
描述
32-bit Power ArchitectureÂ® Dual Core Microcontrollers for Industrial Networking

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数据手册

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PPXD2020VMG116R 数据手册

Features

2.3

PXN21 Block Diagram

Figure 2 shows a top-level block diagram of the PXN21.

PXN21 Block Diagram

Debug

JTAG

32 kHz

XTAL

4–40 MHz

XTAL

16 MHz

IRC

VREG

Controller

Masters

e200z650 Core

VLE

Nexus3 (Z6)

RTC/API

SWT

STM

INTC

PIT

128 kHz

IRC

FMPLL

Nexus2+ (Z0)

MMU (32 TLB)

FPU/SPE

Semaphores

e200z0 Core

32-ch DMA

Mux

32 KB Cache

4/8 Way

VLE

BAM

SIU

Crossbar Switch (XBAR)

Memory Protection Unit (MPU)

2 MB

Flash

(ECC)

PBRIDGE B

PBRIDGE A

128 KB

SRAM

(ECC)

8 x UART/LIN

64 x ADC

2 x I

4 x UART/LIN

2 x SPI

Standby RAM

ECSM

32 x eMIOS

5 x CAN

2 x I

CTU

MPU

NDI

– Memory protection unit

– Nexus debug interface

ADC

BAM

CAN

CTU

ECC

ECSM

eDMA

eMIOS

FMPLL

I²C

– Analog-to-digital converter

– Boot assist module

– Controller area network controller

– Cross triggering unit

PBRIDGE – Peripheral I/O bridge

PIT

RTC

SIU

SPI

– Periodic interrupt timer

– Real time clock

– System integration unit

– Serial peripheral interface controller

– System timer module

– Software watchdog timer

– Error correction code

– Error correction status module

– Enhanced direct memory access controller

– Timed input/output

– Frequency-modulated phase-locked loop

– Inter-integrated circuit controller

– Interrupt controller

STM

SWT

UART/LIN – Universal asynchronous receiver/transmitter/

INTC

JTAG

local interconnect network

– Voltage regulator

– Joint Test Action Group interface

VREG

Figure 2. PXN21 Block Diagram

2.4

Critical Performance Parameters

The critical performance parameters of the PXN20 devices feature the following:

•

Fully static design operation up to a maximum of 116 MHz, based on 105 C ambient

PXN20 Product Brief, Rev. 1

Freescale Semiconductor

1 2 3 456 7 8...23

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