Datasheet > PPXD2020VMG116R

PPXD2020VMG116R

更新时间： 2022-04-07 12:02:34

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		微控制器
页数	文件大小	规格书
23页	119K
描述
32-bit Power ArchitectureÂ® Dual Core Microcontrollers for Industrial Networking

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PPXD2020VMG116R 数据手册

Features

2.2

PXN20 Block Diagram

Figure 1 shows a top-level block diagram of the PXN20 microcontrollers.

PXN20 Block Diagram

Debug

JTAG

32 kHz

XTAL

4-40 MHz

XTAL

16 MHz

IRC

VREG

Controller

Masters

e200z650 Core

VLE

Nexus3 (Z6)

RTC/API

SWT

STM

INTC

PIT

128 kHz

IRC

FMPLL

Nexus2+ (Z0)

MMU (32 TLB)

FPU/SPE

Semaphores

e200z0 Core

16-ch DMA

Mux

32 KB Cache

4/8 Way

Ethernet

MLB-DIM FlexRay™

VLE

BAM

SIU

Crossbar Switch (XBAR)

PBRIDGE A

2 MB

Flash

(ECC)

PBRIDGE B

80 KB

SRAM

(ECC)

512 KB

SRAM

(ECC)

6 x UART/LIN

36 x ADC

2 x I²C

2 x SPI

6 x CAN

2 x SPI

2 x I²C

Standby RAM

ECSM

24 x eMIOS

ECSM

ADC

BAM

CAN

– Analog-to-digital converter

– Boot assist module

– Controller area network controller

– Error correction code

– Error correction status module

– Timed input/output

– Enhanced direct memory access controller

– Fast ethernet controller

MLB-DIM – Media Local Bus device interface module

NDI – Nexus debug interface

PBRIDGE– Peripheral I/O bridge

ECC

PIT

RTC

SIU

SPI

STM

SWT

– Periodic interrupt timer

– Real time clock

– System integration unit

– Serial peripheral interface controller

– System timer module

ECSM

eMIOS

eDMA

FEC

FlexRay™ – FlexRay bus controller

– Software watchdog timer

FMPLL

– Frequency-modulated phase-locked loop

– Inter-integrated circuit controller

– Interrupt controller

UART/LIN – Universal asynchronous receiver/transmitter/

I²C

local interconnect network

INTC

JTAG

VREG

– Voltage regator

– Joint Test Action Group interface

Figure 1. PXN20 Block Diagram

PXN20 Product Brief, Rev. 1

Freescale Semiconductor

1 2 345 6 7...23

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