Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5604P
Rev. 5, 11/2009
MPC5604P
144 LQFP
20 mm x 20 mm
100 LQFP
14 mm_x_14 mm
MPC5604P Microcontroller
Data Sheet
• Two 10-bit A/D converters
• High performance 64 MHz e200z0h CPU
– 32-bit Power Architecture Book E CPU
– Variable Length Encoding (VLE)
• Available memory
– As much as 512 KB on-chip code flash memory with
additional 64 KB for EEPROM emulation (data flash),
with ECC, with erase/program controller
– As much as 40 KB on-chip RAM with ECC
• Fail safe protection
– Two × 15 input channels, four channels shared among
the two A/D converters
– Conversion time < 1 µs including sampling time at full
precision
– Programmable Cross Triggering Unit (CTU)
– Four analog watchdogs with interrupt capability
• On-chip CAN/UART/FlexRay Bootstrap loader with Boot
Assist Module (BAM)
• FlexPWM unit
– Programmable watchdog timer
– Junction temperature sensor
– Non-maskable interrupt
– Eight complementary or independent outputs with ADC
synchronization signals
– Polarity control, reload unit
– Integrated configurable dead time unit and inverter fault
input pins
– 16-bit resolution, up to 2 × f
– Lockable configuration
– Clock generation
– Fault collection unit
• Nexus L2+ interface
• Interrupts
– 16 priority level controller
• 16-channel eDMA controller
CPU
• General purpose I/Os
– 4–40 MHz main oscillator
– Individually programmable as input, output or special
function
– 16 MHz internal RC oscillator
– Software controlled FMPLL capable of speeds as fast as
64 MHz
• Two general purpose eTimer units
– Six timers each with up/down count capabilities
– 16-bit resolution, cascadable counters
– Quadrature decode with rotation direction flag
– Double buffer input capture and output compare
• Communications interfaces
• Voltage supply
– 3.3 V or 5 V supply for I/Os and ADC
– On-chip single supply voltage regulator with external
ballast transistor
– Operating temperature ranges: –40 to 125 °C or
–40 to 105 °C
– Two LINFlex channels (LIN 2.1)
– Four DSPI channels with automatic chip select
generation
– FlexCAN interface (2.0B Active) with 32 message
objects
– Safety port based on FlexCAN with 32 message objects
and up to 7.5 Mbit/s capability; usable as second CAN
when not used as safety port
– FlexRay™ module (V2.1) with dual or single channel,
32 message objects and up to 10 Mbit/s
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008, 2009. All rights reserved.
Preliminary—Subject to Change Without Notice