Datasheet > PO49FCT3805BSU

PO49FCT3805BSU

更新时间： 2024-11-14 06:04:35

品牌	Logo	应用领域
POTATO		驱动器时钟
页数	文件大小	规格书
7页	648K
描述
3.3V Dual 1:5 CMOS Clock Buffered Driver

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PO49FCT3805BSU 数据手册

PO49FCT3805B

3.3V Dual 1:5 CMOS Clock Buffered Driver

08/01/06

800MHz TTL/CMOS Potato Chip

FEATURES:

DESCRIPTION:

Potato Semiconductor’s PO49FCT3805B is

designed for world top performance using

submicron CMOS technology to achieve

800MHz TTL output frequency with less than

80ps output pin to pin skew.

. Patented technology

. Operating frequency up to 800MHz with 2pf load

. Operating frequency up to 600MHz with 5pf load

. Operating frequency up to 300MHz with 15pf load

. Operating frequency up to 100MHz with 50pf load

. Very low output pin to pin skew < 80ps

. Very low pulse skew < 300ps

. VCC = 1.65V to 3.6V

. Propagation delay < 2.4ns max with 15pf load

. Low input capacitance: 3pf typical

PO49FCT3805B is a 1.65V to 3.6V CMOS

Dual 1 input to 5 outputs Buffered driver to

achieve 800MHz output frequency.

Typical applications are clock and signal distribution.

. Dual 1:5 fanout

Inputs can be driven from either 3.3V or 5V devices.

This feature allows the use of these devices as

translators in a mixed 3.3V/5V system environment.

. Available in 20pin 300mil wide SOIC package

. Available in 20pin 150mil wide QSOP package

. Available in 20pin 209mil wide SSOP package

Pin Configuration

Logic Block Diagram

Pin Description

Pin Name

Description

Inputs

INA, INB

Outputs

OAn, OBn

INA, INB

Signal or clock Inputs

MON

Hi-Z State Output Enable Inputs (Active LOW)

OAn, OBn

MON

Signal or clock Outputs

Monitor Output

Vcc, GND

Power, Ground

12 3 4 5 6 7

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