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PIL3100Q PDF预览

PIL3100Q

更新时间: 2024-09-23 17:49:23
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 277K
描述
Multiplexer And Demux/Decoder, 4-Func, 1 Line Input, 2 Line Output, True Output, CMOS, PDSO16, 0.150 INCH, PLASTIC, QSOP-16

PIL3100Q 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SSOP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:4.9 mm逻辑集成电路类型:MULTIPLEXER AND DEMUX/DECODER
湿度敏感等级:1功能数量:4
输入次数:1输出次数:2
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):240
传播延迟(tpd):0.25 ns认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

PIL3100Q 数据手册

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PI3L100  
3.3V, Wide Bandwidth, Quad  
2:1 Mux/DeMux LAN Switch  
Features  
Description  
• Replaces Mechanical Relays  
Pericom Semiconductor’s PI3L100 is a Quad 2:1 multiplexer/  
demultiplexer LanSwitch with three-state outputs. This device  
can be used for switching between various standards, such as 10  
Base-T and 100 Base-T. Generally, this part can be used to replace  
mechanicalrelaysinlowvoltageLANapplicationsthathavephysical  
layer, unshielded twisted pair media (UTP) with either CAT 3 or  
CAT 5 grade cable.  
• High-performance, Low-cost Solution for switching between  
Different LAN Signals  
• Ultra-low Quiescent Power (0.1µA typical)  
• Low Crosstalk: –100dB @ 10 MHz  
• Low Insertion Loss or On-Resistance: 5 typical  
• Single Supply Operation: 3.3V ±10%  
• Off Isolation: –50dB @ 10 MHz  
• Wide-bandwidth data rates >200 MHz  
• Packaging (Pb-free & Green available):  
– 16-pin 150 mil wide plastic QSOP (Q)  
– 16-pin 173 mil wide plastic TSSOP (L)  
Block Diagram  
Pin Configuration  
A
B
I
B
I
C
C
I
D
I
D
I 1  
A
0
I
1
0
1
I
0
1
0
I
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
S
V
E
CC  
0
A
0
I
I
A
1
D
E
S
I
I
Y
A
D1  
B
0
B
1
Y
I
I
D
C
I
0
Y
B
C
I
1
GND  
Y
C
Y
A
Y
Y
Y
D
B
C
(1)  
Truth Table  
Pin Description  
E
S
YA  
YB  
YC  
YD  
Hi-Z  
Function  
Pin Name  
Description  
IAn-IDn  
S
Data Inputs  
Select Inputs  
Enable  
H
X
Hi-Z Hi-Z Hi-Z  
Disable  
L
L
L
A
A
B
B
C
D
D
S = 0  
S = 1  
I
0
1
I
I
0
1
O
0
I
I
0
1
E
H
C
1
I
I
YA-YD  
GND  
Data Outputs  
Ground  
Note:  
1. H = High Voltage Level, L = Low Voltage Level  
V
Power  
CC  
1
PS8504E  
02/02/05  

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