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PIC32MX274F256D PDF预览

PIC32MX274F256D

更新时间： 2024-11-01 14:48:55
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
368页 3506K
描述
The PIC32MX27x family brings lower power run, sleep and deep sleep currents to the PIC32MX family,

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PIC32MX274F256D 数据手册

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PIC32MX1XX/2XX  
28/44-PIN XLP FAMILY  
32-bit XLP Microcontrollers (up to 256 KB Flash and 64 KB SRAM)  
with Audio and Graphics Interfaces, USB, and Advanced Analog  
-
Programmable references with 32 voltage points  
Operating Conditions  
•
•
2.5V to 3.6V, -40ºC to +85ºC, DC to 72 MHz  
2.5V to 3.6V, -40ºC to +105ºC, DC to 72 MHz  
Timers/Output Compare/Input Capture  
•
Five General Purpose Timers:  
Five 16-bit and up to two 32-bit Timers/Counters  
Core: 72 MHz/116 DMIPS MIPS32® M4K®  
-
®
•
•
•
•
Five Output Compare (OC) modules  
Five Input Capture (IC) modules  
Peripheral Pin Select (PPS) to allow function remap  
Real-Time Clock and Calendar (RTCC) module  
•
•
•
MIPS16e mode for up to 40% smaller code size  
Code-efficient (C and Assembly) architecture  
Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply  
Clock Management  
Communication Interfaces  
•
•
•
•
•
0.9% internal oscillator  
•
•
USB 2.0-compliant Full-speed OTG controller  
Programmable PLLs and oscillator clock sources  
Fail-Safe Clock Monitor (FSCM)  
Independent Watchdog Timer  
Fast wake-up and start-up  
Two UART modules (18 Mbps):  
®
-
Supports LIN 2.1 protocols and IrDA support  
•
•
•
•
Two 4-wire SPI modules (25 Mbps)  
Two I C modules (up to 1 Mbaud) with SMBus support  
PPS to allow function remap  
Parallel Master Port (PMP)  
2
Power Management  
•
Various power management options for extreme power  
reduction (Deep Sleep, Sleep, and Idle)  
Deep Sleep current: 673 nA (typical)  
Integrated POR and BOR  
Direct Memory Access (DMA)  
•
•
•
•
Four channels of hardware DMA with automatic data size  
detection  
Programmable High/Low-Voltage Detect (HLVD) on  
VDD  
•
•
Two additional channels dedicated for USB  
Programmable Cyclic Redundancy Check (CRC)  
Audio Interface Features  
2
•
•
•
Data communication: I S, LJ, RJ, and DSP modes  
Input/Output  
2
Control interface: SPI and I C  
•
10 mA source/sink on all I/O pins and up to 14 mA on non-  
standard VOH  
Master clock:  
-
-
-
Generation of fractional clock frequencies  
Can be synchronized with USB clock  
Can be tuned in run-time  
•
•
•
5V-tolerant pins  
Selectable open drain, pull-ups, and pull-downs  
External interrupts on all I/O pins  
Advanced Analog Features  
Class B Support  
•
ADC Module:  
•
Class B Safety Library, IEC 60730  
-
-
10-bit 1.1 Msps rate with one S&H  
Up to 10 analog inputs on 28-pin devices and 13 analog  
inputs on 44-pin devices  
Debugger Development Support  
•
•
•
•
In-circuit and in-application programming  
4-wire MIPS Enhanced JTAG interface  
Unlimited program and six complex data breakpoints  
IEEE 1149.2-compatible (JTAG) boundary scan  
•
•
Flexible and independent ADC trigger sources  
Charge Time Measurement Unit (CTMU):  
®
-
-
-
Supports mTouch™ capacitive touch sensing  
Provides high-resolution time measurement (1 ns)  
On-chip temperature measurement capability  
Integrated Software Libraries and Tools  
•
Comparators:  
Up to three Analog Comparator modules  
•
•
C/C++ compiler with native DSP/fractional support  
MPLAB Harmony Integrated Software Framework  
®
-
Packages  
Type  
SOIC  
QFN  
TQFP  
Pin Count  
I/O Pins (up to)  
Contact/Lead Pitch  
Dimensions  
28  
28  
21  
44  
34  
44  
34  
21  
1.27  
0.65  
0.65  
0.80  
17.90x10.30x2.65  
6x6x0.9  
8x8x0.9  
10x10x1.0  
Note: All dimensions are in millimeters (mm) unless specified.  
2017-2019 Microchip Technology Inc.  
DS60001404E-page 1  
1234567...368

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