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PI74FCT16245ETK PDF预览

PI74FCT16245ETK

更新时间: 2024-10-28 20:13:31
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路电视
页数 文件大小 规格书
6页 212K
描述
Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.173 INCH, PLASTIC, TVSOP-48

PI74FCT16245ETK 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP, TSSOP48,.25,16针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.75
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:FCTJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:9.7 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.064 A
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.25,16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:3.2 ns
传播延迟(tpd):3.2 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:4.4 mmBase Number Matches:1

PI74FCT16245ETK 数据手册

 浏览型号PI74FCT16245ETK的Datasheet PDF文件第2页浏览型号PI74FCT16245ETK的Datasheet PDF文件第3页浏览型号PI74FCT16245ETK的Datasheet PDF文件第4页浏览型号PI74FCT16245ETK的Datasheet PDF文件第5页浏览型号PI74FCT16245ETK的Datasheet PDF文件第6页 
PI74FCT16245T  
PI74FCT162245T  
PI74FCT162H245T  
Fast CMOS 16-Bit  
Bidirectional Transceivers  
Product Features  
Product Description  
Common Features  
Pericom Semiconductor’s PI74FCT series of logic circuits are  
produced using the Company’s advanced 0.6 micron CMOS  
technology, achieving industry leading speed grades.  
• PI74FCT16245T, PI74FCT162245T and PI74FCT162H245  
are high-speed, low-power devices with high-current drive  
ThePI74FCT16245T,PI74FCT162245T,andPI74FCT162H245T  
are 16-bit bidirectional transceivers designed for asynchronous  
two-waycommunicationbetweendatabuses.Thedirectioncontrol  
input pin (xDIR) determines the direction of data flow through the  
bidirectional transceiver. The Direction and Ouput Enable controls  
are designed to operate these devices as either two independent  
8-bit transceivers or one 16-bit transceiver. The output enable (OE)  
input, when HIGH, disables both A and B ports by placing them in  
HIGH Z condition.  
• V = 5V ± 10%  
CC  
• Hysteresis on all inputs  
• Packages available:  
– 48-pin 240 mil wide plastic TSSOP (A48)  
– 48-pin 173 mil wide plastic TVSOP (JEDEC TSSOP K48)  
– 48-pin 300 mil wide plastic SSOP (V48)  
PI74FCT16245T Features  
• High output drive: I = –32mA; I = 64mA  
OH  
OL  
• Power off disable outputs permit “live insertion”  
• Typical V (Output Ground Bounce)  
The PI74FCT16245T output buffers are designed with a Power-  
Off disable allowing “live insertion” of boards when used as  
backplane drivers.  
OLP  
< 1.0V at V = 5V, T = 25°C  
CC  
A
The PI74FCT162245T has ±24mA balanced output drivers. It is  
designed with current limiting resistors at its outputs to control the  
output edge rate resulting in lower ground bounce and undershoot.  
This eliminates the need for external terminating resistors for most  
interface applications.  
PI74FCT162245T Features  
• Balanced output drivers: ±24mA  
• Reduced system switching noise  
• Typical V  
(Output Ground Bounce)  
OLP  
< 0.6V at V = 5V, T = 25°C  
CC  
A
The PI74FCT162H245T has “Bus Hold” which retains the input’s  
last state whenever the input goes to high-impedance preventing  
“floatinginputsandeliminatingtheneedforpull-up/downresistors.  
PI74FCT162H245T Features  
• Bus Hold retains last active bus state during Three-State  
• Eliminates the need for external pull-up resistors  
Logic Block Diagram  
PS2032D  
05/17/99  
1

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