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PI6LC48P0405 PDF预览

PI6LC48P0405

更新时间: 2024-12-02 01:12:35
品牌 Logo 应用领域
百利通 - PERICOM /
页数 文件大小 规格书
9页 1262K
描述
4-Output LVPECL Networking Clock Generator

PI6LC48P0405 数据手册

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PI6LC48P0405  
4-Output LVPECL Networking Clock Generator  
Features  
Description  
ÎFour differential LVPECL output pairs  
e PI6LC48P0405 is a 4-output LVPECL synthesizer optimized  
to generate 125MHz clock frequencies and is a member of Peri-  
com’s HiFlex family of high performance clock solutions.  
ÎSelectable crystal oscillator interface or LVCMOS/LVTTL  
single-ended clock input  
e PI6LC48P0405 uses Pericom’s proprietary low phase noise  
VCO technology and can achieve less than 0.32ps typical rms  
phase jitter, it is ideal for Ethernet interface in all kind of sys-  
tems.  
ÎSupports the following output frequency: 125MHz  
ÎRMS phase jitter @ 125MHz, using a 25MHz crystal  
(1.875MHz – 20MHz): 0.14ps (typical)  
ÎRMS phase jitter @ 125MHz, using a 25MHz crystal (12kHz  
– 20MHz): 0.32ps (typical)  
ÎFull 3.3V or 2.5V supply modes  
Î-40°C to 85°C operating temperature  
ÎAvailable in lead-free package: 24-TSSOP  
Applications  
ÎNetworking systems  
Block Diagram  
PLL_Bypass  
CLK0  
XTAL_IN  
OSC  
CLK0#  
XTAL_OUT  
÷5  
CLK1  
Phase  
Detector  
VCO  
CLK1#  
Ref_IN  
CLK2  
CLK2#  
IN_SEL  
M = 25 (fixed)  
CLK3  
CLK3#  
M_reset  
www.pericom.com  
PI6LC48P0405  
Rev.A  
09/01/15  
15-0118  
1

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