Datasheet > PI6LC48L0201AZHIEX

PI6LC48L0201AZHIEX

更新时间： 2024-12-01 01:12:35

品牌	Logo	应用领域
百利通 - PERICOM		/
页数	文件大小	规格书
10页	925K
描述
2-Output LVDS Networking Clock Generator

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PI6LC48L0201A

2-Output LVDS Networking Clock Generator

Features

Description

ꢀÎTwo diﬀerential LVDS output pairs

e PI6LC48L0201A is a 2-output LVDS synthesizer opti-

mized to generate Ethernet reference clock frequencies and is a

member of Pericom’s HiFlex family of high performance clock

solutions. Using a 25MHz crystal, the most popular Ethernet

frequencies can be generated based on the settings of 2 frequen-

cy select pins.

ꢀÎSelectable crystal oscillator interface or LVCMOS/LVTTL

single-ended clock input

ꢀÎSupports the following output frequencies: 62.5MHz,

125MHz, 156.25MHz

ꢀÎRMS phase jitter @ 156.25MHz, using a 25MHz crystal

e PI6LC48L0201A uses Pericom’s proprietary low phase noise

PLL technology to achieve ultra low phase jitter, so it is ideal for

Ethernet interface in all kind of systems.

(12kHz – 20MHz): 0.3ps (typical)

ꢀÎRMS phase jitter @ 156.25MHz, using a 25MHz crystal

(12kHz – 20MHz): 0.5ps (max)

ꢀÎFull 3.3V or 2.5V supply modes

ꢀÎIndustrial operating temperature

ꢀÎAvailable in lead-free package: 20-TQFN

Applications

ꢀÎNetworking systems

Block Diagram

XTAL_IN

OSC

PFD

VCO

XTAL_OUT

CLK0

CLK0#

Ref_IN

CLK1

CLK1#

IN_SEL

M_reset

PLL_ByPass

N_SEL[0:1]

www.pericom.com

PI6LC48L0201A

Rev. A

08/04/2015

15-0104

12 3 4 5 6 7...10

中文翻译

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