PI6C9911 & PI6C9911E
5V High-Speed Programmable Skew
Clock Buffers - SuperClock
Product Features
Description
• Four pairs of programmable skew outputs
• User-selectable output functions:
− Selectable skews
The PI6C9911 and PI6C9911E are low-skew, low jitter, 5V phase-
lock-loop (PLL) programmable skew clock drivers, for
high-performance computing and networking applications. These
parts offer user-selectable skew-control of 4 output pairs, provid-
ing the timing delays necessary to optimize high-performance
clock-distribution circuits.
− Inverted and noninverted
− Operation at ½ and ¼ input frequency
− Operation at 2X and 4X input frequency
• Low skew <100ps typical same pair, 250ps max.
• Allow REF clock input to have Spread Spectrum
modulation for EMI reduction
Each output can be hardwired to one of nine delay or function
configurations. Delay increments are determined by the input clock
frequency and the configurations selected by the user.
The PI6C9911 and PI6C9911E allow the REF clock input to have
Spread Spectrum modulation for EMI reduction.
• 2X, 4X, ½ and ¼ outputs
• 3-level inputs for skew and output frequency control
• External feedback, internal loop filter
• Low cycle-to-cycle Jitter: <25ps RMS
• Duty cycle of output clock signals: 45% min. 55% max.
• Same pinout as Cypress CY7B9911
• Available in 32-pin PLCC Package (J)
Both buffers are pin-compatable with Cypresss RoboClock
CY7B9911, but with improvedAC/DC characteristics.
The PI6C9911 and PI6C9911E also have the same pinout as
Cypresss CY7B9911and with balanced output drive.
• Output Operation
3.75 to 100 MHz for PI6C9911
3.75 to 125 MHz for PI6C9911E
Logic Block Diagram
Pin Configuration
4
3
2
1
32 31 30
29
3F1
4F0
5
6
7
8
9
2F0
28
27
26
25
24
23
22
21
GND
1F1
4F1
32-Pin
J
VCCQ
VCCN
4Q1
1F0
VCCN
1Q0
1Q1
GND
GND
10
11
12
13
4Q0
GND
GND
14 15 16 17 18 19 20
PS8451B
03/28/01
1