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PI6C485352FAE PDF预览

PI6C485352FAE

更新时间: 2024-09-30 21:03:11
品牌 Logo 应用领域
百利通 - PERICOM 逻辑集成电路
页数 文件大小 规格书
7页 607K
描述
Multiplexer, 6C Series, 1-Func, 12 Line Input, 1 Line Output, True Output, PQFP48, 0.276 INCH, GREEN, TQFP-48

PI6C485352FAE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:QFP
包装说明:TFQFP, TQFP48,.35SQ针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:8.12
系列:6CJESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
逻辑集成电路类型:MULTIPLEXER功能数量:1
输入次数:12输出次数:1
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TFQFP
封装等效代码:TQFP48,.35SQ封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:4 ns
传播延迟(tpd):4 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

PI6C485352FAE 数据手册

 浏览型号PI6C485352FAE的Datasheet PDF文件第2页浏览型号PI6C485352FAE的Datasheet PDF文件第3页浏览型号PI6C485352FAE的Datasheet PDF文件第4页浏览型号PI6C485352FAE的Datasheet PDF文件第5页浏览型号PI6C485352FAE的Datasheet PDF文件第6页浏览型号PI6C485352FAE的Datasheet PDF文件第7页 
PI6C485352  
2.5V/3.3V, 500 MHz Twelve 2-to-1 Differential  
LVPECL Clock Multiplexer  
Features  
Description  
ÎPin-to-pin compatible to ICS85352I  
ÎFMAX ≤ 500 MHz  
e PI6C485352 is a high-performance low-skew LVPECL  
fanout buffer. PI6C485352 features two selectable differential  
inputs and translates to twelve LVPECL output pairs. e inputs  
can also be configured to single-ended with external resistor  
bias circuit. e CLK input accepts LVPECL, LVDS, LVHSTL,  
SSTL or HCSL signals. e PI6C485352 is ideal for differential  
to LVPECL translations and/or LVPECL clock distribution.  
ÎPropagation Delay < 4ns  
ÎOutput-to-output skew < 100ps  
Î12 pairs of differential LVPECL outputs  
ÎSelectable differential CLK and /CLK inputs  
Typical clock translation and distribution applications are data-  
communications and telecommunications.  
ÎCLK, /CLK pair accepts LVDS, LVPECL, LVHSTL, SSTL and  
HCSL input level  
Applications  
ÎNetworking systems including switches and Routers  
ÎSelect input accept CMOS/LVTTL levels  
Î2.5V/3.3V power supply  
ÎHigh frequency backplane based computing and telecom  
ÎOperating Temperature: -40°C to +85°C  
ÎPackaging (Pb-free & Green):  
ÎΗ 48-pin TQFP (FA)  
platforms  
Block Diagram  
Pin Configuration (48-Pin TQFP)  
48 47 46 45 44 43 42 41 40 39 38 37  
Q0  
/Q0  
Q1  
1
2
3
4
5
6
7
8
9
Q6  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
12  
SEL [0:11]  
/Q6  
Q7  
CLK0  
/CLK0  
/Q1  
Q2  
/Q7  
Q8  
0
Q0  
/Q0  
/Q2  
Q3  
/Q8  
Q9  
CLK1  
1
/CLK1  
/Q3  
Q4  
/Q9  
Q10  
/Q10  
Q11  
/Q4 10  
0
Q11  
11  
12  
Q5  
26  
25  
/Q11  
/Q5  
/Q11  
1
13 14 15 16 17 18 19 20 21 22 23 24  
PI6C485352 Rev. A  
01/24/13  
13-0003  
1

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