PI6C39911

更新时间： 2024-11-16 22:39:59

品牌	Logo	应用领域
百利通 - PERICOM		时钟
页数	文件大小	规格书
11页	263K
描述
3.3V High Speed LVTTL or Balanced Output Programmable Skew Clock Buffer - SuperClock

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PI6C39911 数据手册

PI6C39911

3.3V High Speed LVTTL or Balanced Output

Programmable Skew Clock Buffer - SuperClock^®

Features

Description

• All output pair skew <100ps typical (250 Max.)

• 12.5 MHz to 133 MHz output operation

The PI6C39911 offers selectable control over system clock func-

tions. These multiple-output clock drivers provide the system

integrator with functions necessary to optimize the timing

• 3.125 MHz to 133 MHz input operation (input as low as 3.125

of high-performance computer systems. Eight individual drivers,

arranged as four pairs of user-controllable outputs, can each drive

terminated transmission lines with impedances as low as 50-Ohms

whiledeliveringminimalandspecifiedoutputskewsandfull-swing

logiclevels.

MHzfor4xoperation,or6.25MHzfor2xoperation)

• User-selectable output functions

— Selectable skew to 18ns

— Inverted and non-inverted

— Operation at ½ and ¼ input frequency

— Operation at 2X and 4X input frequency

• Zero input-to-output delay

• 50% duty-cycle outputs

• Inputs are 5V Tolerant

• LVTTLoutputsdrive50-Ohmterminatedlines

• Operates from a single 3.3V supply

• Low operating current

• 32-pinPLCCpackage

• Jitter < 200ps peak-to-peak (< 25ps RMS)

Each output can be hardwired to one of nine skews or function

configurations. Delay increments of 0.7ns to 1.5ns are determined

by the operating frequency with outputs able to skew up to ±6 time

units from their nominal “zero” skew position. The completely

integrated PLL allows external load and transmission line delay

effects to be canceled. The user can create output-to-output skew

of up to ±12 time units.

Divide-by-two and divide-by-four output functions are provided

foradditionalflexibilityindesigningcomplexclocksystems.When

combinedwiththeinternalPLL,thesedividefunctionsallowdistri-

butionofalow-frequencyclockthatcanbemultipliedbytwoorfour

attheclockdestination.This feature allows flexibility and simpli-

fies system timing distribution design for complex high-speed

systems.

PinConfiguration

LogicBlockDiagram

Test

Phase

Freq.

DET

VCO and

Time Unit

Generator

Filter

REF

32 31 30

3F1

4F0

4F1

2F0

GND

1F1

1F0

4Q0

4Q1

4F0

4F1

32 Pin

CCQ

Select Inputs

(three level)

CCN

4Q1

CCN

Skew

1Q0

1Q1

GND

3Q0

3Q1

3F0

3F1

4Q0

Select

GND

2Q0

2Q1

2F0

2F1

14 15 16 17 18 19 20

Matrix

1Q0

1Q1

1F0

1F1

PS8497E

09/13/02

12 3 4 5 6 7...11

中文翻译

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与PI6C39911相关器件

型号	品牌	获取价格	描述	数据表
PI6C399111J	PERICOM	获取价格	3.3V High Speed LVTTL or Balanced Output Programmable Skew Clock Buffer - SuperClock
PI6C39911-2	PERICOM	获取价格	Clock IC \| 250ps Accuracy. 3.3V. LVTTL. 3.75 to 110 MHz
PI6C39911-2E	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC
PI6C39911-2J	PERICOM	获取价格	3.3V High Speed LVTTL or Balanced Output Programmable Skew Clock Buffer - SuperClock
PI6C39911-2JE	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), BICMOS, PQCC32,
PI6C39911-2JEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), BICMOS, PQCC32,
PI6C39911-2JX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC
PI6C39911-5	PERICOM	获取价格	Clock IC \| 500ps Accuracy. 3.3V. LVTTL. 3.75 to 110 MHz
PI6C39911-5E	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PQCC32, PLASTIC
PI6C39911-5J	PERICOM	获取价格	3.3V High Speed LVTTL or Balanced Output Programmable Skew Clock Buffer - SuperClock

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