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PI6C184-02S PDF预览

PI6C184-02S

更新时间: 2024-11-24 23:27:39
品牌 Logo 应用领域
其他 - ETC 时钟驱动器输出元件
页数 文件大小 规格书
6页 337K
描述
THIRTEEN DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|SOP|28PIN|PLASTIC

PI6C184-02S 数据手册

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PI6C184-02  
Precision 1-13 Clock Buffer  
Features  
Description  
High speed, low noise non-inverting 1-13 buffer  
Supports up to four SDRAM DIMMs  
Low skew (<250ps) between any two output clocks  
The PI6C184-02 is a high-speed low-noise 1-13 non-inverting  
buffer designed for SDRAM clock buffer applications.  
ThisbufferisintendedtobeusedwiththePI6C104clockgenerator  
for Intel Architecture for both desktop and mobile systems.  
2
I C Serial Configuration interface  
At power up all SDRAM output are enabled and active. The  
Multiple V , V pins for noise reduction  
2
DD  
SS  
I C Serial control may be used to individually activate/deactivate  
3.3V power supply voltage  
any of the 13 output drivers.  
28-pin SSOP and SOIC packages (H, S)  
Note:  
2
Purchase of I C components from Pericom conveys a license to  
2
use them in an I C system as defined by Philips.  
Block Diagram  
Pin Configuration  
28-Pin  
H, S  
PS8319  
05/03/00  
1
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