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PI6C184BH PDF预览

PI6C184BH

更新时间: 2024-11-24 23:27:39
品牌 Logo 应用领域
其他 - ETC 时钟驱动器输出元件
页数 文件大小 规格书
7页 489K
描述
THIRTEEN DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|SSOP|28PIN|PLASTIC

PI6C184BH 数据手册

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PI6C184B  
Precision 1-13 Clock Buffer  
Description  
Product Features  
The PI6C184B, a high-speed low-noise 1-13 non-inverting buffer  
designed for SDRAM clock buffer applications, is intended to be  
usedwiththePI6C104clockgeneratorforIntelArchitectureforboth  
desktop and mobile systems.  
High speed, to 133 MHz  
Low noise non-inverting 1-13 buffer  
Supports up to four SDRAM DIMMs  
Low skew (< 250ps) between any two output clocks  
2
At power up, all SDRAM outputs are enabled and active. The I C  
Serial control may be used to individually activate/deactivate any  
of the 13 output drivers.  
2
I CSerialConfigurationinterface  
Multiple V , V pins for noise reduction  
Note:  
DD SS  
2
Purchase of I C components from Pericom conveys a license to  
use them in an I C system as defined by Philips.  
3.3V power supply voltage  
Separate Hi-Z pin for testing  
Package:28-pinSSOPpackages(H)  
BlockDiagram  
2
PinConfiguration  
28-Pin  
H
PS8467  
05/03/00  
1
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