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PI3EQX4951STZDE

更新时间: 2024-11-26 01:17:11
品牌 Logo 应用领域
百利通 - PERICOM /
页数 文件大小 规格书
9页 499K
描述
3.3V, 1-port, SATA2 i/m ReDriver with Analog/Digital Configuration

PI3EQX4951STZDE 数据手册

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PI3EQX4951ST  
3.3V, 1-port, SATA2 i/m ReDriver™ with Analog/Digital Configuration  
Features  
Description  
Î SATA2 i, m; external SATA2  
Pericom Semiconductor’s PI3EQX4951ST is a low power, signal  
ReDriver™. e device provides programmable equalization, to  
optimize performance over a variety of physical mediums by  
reducing Inter-Symbol Interference. PI3EQX4951ST supports  
two 100-Ohm Differential CML data I/O’s between the Protocol  
ASIC to a switch fabric, across a backplane, or to extend the sig-  
nals across other distant data pathways on the user’s platform.  
Î Two 3.0Gbps differential signal pairs  
Î Independent Digital Output Emphasis Control  
Î 100-Ohm Differential CML I/O’s  
Î Input signal level detect and squelch for each channel  
Î OOB Support  
e integrated equalization circuitry provides flexibility with  
signal integrity of the signal before the ReDriver.  
Î Enhanced Mode Features:  
à Adjustable Receiver Equalization  
à Independent Analog Output Emphasis Control  
Î High impedance I/O termination in standby mode  
A low-level input signal detection and output squelch function is  
provided for each channel. Each channel operates fully indepen-  
dently. When the channels are enabled (EN=1) and operating,  
that channels input signal level (on xI+/-) determines whether  
the output is active. If the input signal level of the channel falls  
below the active threshold level (Vth-) then the outputs are  
driven to the common mode voltage.  
Î Low Power Operation: 300mW typical  
Î Auto-Slumber Mode: 33mW typical  
Î Power down Stand-by Mode: 0.1mW  
Î Supply Voltage: 3.3V 10%  
In addition to signal conditioning, when EN = 0, the device  
enters a low power standby mode.  
Î Packaging: 20-TQFN (4x4mm)  
Pin Diagram (Top Side View)  
Block Diagram  
Signal Detection  
Standard Mode (MODE = 0)  
20 19 18 17 16  
AI+  
AI-  
AO+  
AO-  
NC  
1
15  
14  
13  
CML  
2
3
4
5
NC  
GND  
8
CML  
BI-  
BO-  
BO+  
12  
11  
xO+  
xO-  
xl+  
BI+  
6
7
10  
9
Limiting  
Amp  
Equalizer  
xl-  
Enhanced Mode (MODE = 1)  
- Repeated 2 times -  
x_EQ  
x_EM  
Power  
Management  
Control  
Circuit  
EN  
2019181716  
GND  
AO+  
1
AI+  
AI-  
15  
AO-  
NC  
BI-  
2
3
4
5
14  
NC  
13  
12  
BO-  
BO+  
11  
BI+  
6
7 8 9 10  
www.pericom.com  
PS9072A  
03/23/10  
10-0142  
1

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