PDM34078
AC Electrical Characteristics
Parameter
Symbol
-6 ns
-7 ns
-8 ns
-10 ns
-12 ns
Type
Units
Cycle time
t
10
12.5
15
16.7
20
Min.
ns
CYC
1
2
Clock access time (0 pF load)
Clock to output valid (Std. load)
t
5
6
6
7
7
8
9
11
12
Max.
Max.
ns
ns
CQ0
t
10
CQ
Clock to output invalid
Clock to output high-Z
t
2
2
2
2
2
2
2
2
2
2
Min.
Min.
Max.
Min.
Min.
Min.
Min.
Max.
Max.
Min.
ns
ns
CQX
t
CHZ
10
4
12.5
5
15
5
16.7
6
20
6
Clock pulse width high
Clock pulse width low
OE to output valid
t
ns
ns
ns
ns
ns
ns
ns
CH
t
4
5
5
6
6
CL
3
t
5
5
5
6
6
OE
OE to output low-Z
OE to output high-Z
ZZ standby time
t
0
0
0
0
0
OLZ
OHZ
t
5
5
5
6
6
t
100
100
100
100
100
100
100
100
100
100
ZZS
4
ZZ recovery time
t
ZZREC
SETUP TIMES
Address
t
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
3
3
3
3
3
3
Min.
Min.
Min.
Min.
Min.
Min.
ns
ns
ns
ns
ns
ns
AS
Address status (ADSC, ADSP)
Address advance setup (ADV)
Write signals (BWx, GW)
Data in
t
t
5
AAS
AAS
t
WS
t
DS
6
Chip enables (CE, CE2, CE2)
HOLD TIMES
t
CES
Address
t
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
Min.
Min.
Min.
Min.
Min.
Min.
ns
ns
ns
ns
ns
ns
AH
Address status (ADSC, DSP)
Address advance (ADV)
Write eignals (BWx, GW)
Data in
t
ADSH
7
t
AAH
t
WH
t
DH
Chip enables (CE, CE2, CE2)
t
CEH
8
9
10
11
12
Rev 1.0 - 5/01/98
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