Datasheet > PDM34078SA10QA

PDM34078SA10QA

更新时间： 2024-01-12 01:07:37

品牌	Logo	应用领域
IXYS		静态存储器
页数	文件大小	规格书
14页	312K
描述
SRAM

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

PDM34078SA10QA 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	QFP, QFP100,.7X.9	Reach Compliance Code：	unknown
风险等级：	5.92	最长访问时间：	10 ns
最大时钟频率 (fCLK)：	60 MHz	I/O 类型：	COMMON
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e0
内存密度：	1048576 bit	内存集成电路类型：	STANDARD SRAM
内存宽度：	32	端子数量：	100
字数：	32768 words	字数代码：	32000
工作模式：	SYNCHRONOUS	最高工作温度：	105 °C
最低工作温度：	-40 °C	组织：	32KX32
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	QFP100,.7X.9
封装形状：	RECTANGULAR	封装形式：	FLATPACK
并行/串行：	PARALLEL	电源：	3.3 V
认证状态：	Not Qualified	最大待机电流：	0.003 A
最小待机电流：	3 V	子类别：	SRAMs
最大压摆率：	0.23 mA	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	QUAD	Base Number Matches：	1

PDM34078SA10QA 数据手册

PDM34078

3.3V 32K x 32 Fast CMOS

Synchronous Static RAM

with Burst Counter

and Output Register

Description

Features

The PDM34078 is a 1,048,576 bit synchronous

random access memory organized as 32,768 x 32

bits. This device designed with burst mode

capability and interface controls to provide high-

performance in second level cache designs for x86,

Pentium, 680x0, and PowerPC microprocessors.

Addresses, write data and all control signals except

output enable are controlled through positive edge-

triggered registers. Write cycles are self-timed and

are also initiated by the rising edge of the clock.

Controls are provided to allow burst reads and

writes of up to four words in length. A 2-bit burst

address counter controls the two least-signiﬁcant

bits of the address during burst reads and writes.

The burst address counter selectively uses the 2-bit

counting scheme required by the x86 and Pentium

or 680x0 and PowerPC microprocessors as con-

trolled by the mode pin. Individual write strobes

provide byte write for the four 8-bit bytes of data.

An asynchronous output enable simpliﬁes interface

to high-speed buses.

■ Interfaces directly with the x86, Pentium™, 680X0

and PowerPC™ processors

(100, 80, 66, 60, 50 MHz)

■ Single 3.3V power supply

■ Mode selectable for interleaved or linear burst:

Interleaved for x86 and Pentium

Linear for 680x0 and PowerPC

■ High-speed clock cycle times:

10, 12.5, 15, 16.7 and 20 ns

■ High-density 32K x 32 architecture with burst

address counter and output register

■ Fully registered inputs and outputs for pipelined

operation

■ High-output drive: 30 pF at rated T

■ Asynchronous output enable

■ Self-timed write cycle

■ Separate byte write enables and one global write

enable

■ Internal burst read/write address counter

■ Internal registers for address, data, controls

■ Output data register

■ Burst mode selectable

■ Sleep mode

■ Packages:

100-pin QFP - (Q)

100-pin TQFP - (TQ)

i486, Pentium are trademarks of Intel Corp. PowerPC is a trademark of the International Business Machines Corporation.

Rev 1.0 - 5/01/98

12 3 4 5 6 7...14

下载PDF

与PDM34078SA10QA相关器件

型号	品牌	描述	获取价格	数据表
PDM34078SA10QATR	IXYS	SRAM	获取价格
PDM34078SA10QATY	IXYS	SRAM	获取价格
PDM34078SA10QITY	IXYS	SRAM	获取价格
PDM34078SA10QTR	IXYS	SRAM	获取价格
PDM34078SA10TQITY	IXYS	SRAM	获取价格
PDM34078SA10TQTR	IXYS	SRAM	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

PDM34078SA10QA

PDM34078SA10QA 技术参数

PDM34078SA10QA 数据手册

与PDM34078SA10QA相关器件

与PDM34078SA10QA相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

PDM34078SA10QA

PDM34078SA10QA 技术参数

PDM34078SA10QA 数据手册

与PDM34078SA10QA相关器件

与PDM34078SA10QA相关文章

您还可以找

您在本页遇到什么问题？