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PDM31548SA20SOATR PDF预览

PDM31548SA20SOATR

更新时间: 2024-11-24 15:47:39
品牌 Logo 应用领域
IXYS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
9页 267K
描述
Standard SRAM, 128KX16, 20ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, SOJ-44

PDM31548SA20SOATR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOJ
包装说明:0.400 INCH, PLASTIC, SOJ-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.27
最长访问时间:20 nsJESD-30 代码:R-PDSO-J44
长度:28.56 mm内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
功能数量:1端子数量:44
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:105 °C
最低工作温度:-40 °C组织:128KX16
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:3.76 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

PDM31548SA20SOATR 数据手册

 浏览型号PDM31548SA20SOATR的Datasheet PDF文件第2页浏览型号PDM31548SA20SOATR的Datasheet PDF文件第3页浏览型号PDM31548SA20SOATR的Datasheet PDF文件第4页浏览型号PDM31548SA20SOATR的Datasheet PDF文件第5页浏览型号PDM31548SA20SOATR的Datasheet PDF文件第6页浏览型号PDM31548SA20SOATR的Datasheet PDF文件第7页 
PDM31548  
PRELIMINARY  
128K x 16 CMOS  
3.3V Static RAM  
1
2
Features  
Description  
High-speed access times  
- Com’l: 10, 12, 15 and 20 ns  
- Ind: 12, 15 and 20 ns  
Low power operation (typical)  
- PDM31548SA  
The PDM31548 is a high-performance CMOS static  
RAM organized as 131,072 x 16 bits. The PDM31548  
features low power dissipation using chip enable  
(CE) and has an output enable input (OE) for fast  
memory access. Byte access is supported by upper  
and lower byte controls.  
3
Active: 250 mW  
Standby: 25 mW  
The PDM31548 operates from a single 3.3V power  
supply and all inputs and outputs are fully TTL-  
compatible.  
High-density 128K x 16 architecture  
3.3V (±0.3V) power supply  
Fully static operation  
TTL-compatible inputs and outputs  
Output buffer controls: OE  
Data byte controls: LB, UB  
Packages:  
4
The PDM31548 is available in a 44-pin 400-mil plas-  
tic SOJ and a plastic TSOP (II) package for high-  
density surface assembly and is suitable for use in  
high-speed applications requiring high-speed  
storage.  
5
Plastic SOJ (400 mil) - SO  
Plastic TSOP (II) - T  
6
Functional Block Diagram  
Vcc  
8
Vss  
Memory  
A8-A0  
Cell  
Array  
512 x 128 x 32  
9
Data  
Input/  
Output  
Buffer  
I/O15-I/O0  
Sense Amp  
10  
11  
12  
Column  
Decoder  
WE  
OE  
UB  
LB  
Control  
Logic  
Column  
Address  
Buffer  
Clock  
Generator  
CE  
Rev. 1.3 - 4/13/98  
1

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