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PDM31024LL85ST PDF预览

PDM31024LL85ST

更新时间: 2024-01-01 08:00:26
品牌 Logo 应用领域
IXYS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
8页 221K
描述
Standard SRAM, 128KX8, 85ns, CMOS, PDSO32

PDM31024LL85ST 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
最长访问时间:85 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:8端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP32,.56,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL电源:3.3 V
认证状态:Not Qualified最大待机电流:0.000006 A
最小待机电流:1.5 V子类别:SRAMs
最大压摆率:0.03 mA标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUALBase Number Matches:1

PDM31024LL85ST 数据手册

 浏览型号PDM31024LL85ST的Datasheet PDF文件第1页浏览型号PDM31024LL85ST的Datasheet PDF文件第3页浏览型号PDM31024LL85ST的Datasheet PDF文件第4页浏览型号PDM31024LL85ST的Datasheet PDF文件第5页浏览型号PDM31024LL85ST的Datasheet PDF文件第6页浏览型号PDM31024LL85ST的Datasheet PDF文件第7页 
PRELIMINARY  
PDM31024LL  
Pin Configurations  
Pin Description  
TSOP (I), STSOP (I)  
Name  
Description  
Address Inputs  
1
2
A11  
A9  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
OE  
A16-A0  
I/O7-I/O0  
OE  
A10  
CE1  
I/O7  
I/O6  
I/O5  
I/O4  
I/O3  
Vss  
I/O2  
I/O1  
I/O0  
A0  
3
A8  
Data Inputs/Outputs  
Output Enable Input  
Write Enable Input  
Chip Enable Inputs  
Power (+3.3V)  
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
A13  
WE  
CE2  
A15  
Vcc  
NC  
A16  
A14  
A12  
A7  
WE  
CE1, CE2  
V
CC  
SS  
V
Ground  
A6  
A5  
A4  
A1  
A2  
A3  
Truth Table  
OE  
WE  
CE1  
CE2  
I/O  
MODE  
X
X
L
X
X
H
L
H
X
L
L
L
X
L
Hi-Z  
Hi-Z  
Standby  
Standby  
H
H
H
D
Read  
OUT  
X
H
D
Write  
IN  
H
Hi-Z  
Output Disable  
NOTE: 1. H = V , L = V , X = DON’T CARE  
IH  
IL  
(1)  
Absolute Maximum Ratings  
Symbol  
Rating  
Com’l.  
Ind.  
Unit  
V
Terminal Voltage with Respect to Vss  
Temperature Under Bias  
Storage Temperature  
–0.5 to +4.6  
–55 to +125  
–55 to +125  
1.0  
–0.5 to +4.6  
–65 to +135  
–65 to +150  
1.0  
V
°C  
°C  
W
TERM  
BIAS  
STG  
T
T
P
Power Dissipation  
T
I
DC Output Current  
20  
20  
mA  
°C  
OUT  
(2)  
T
Maximum Junction Temperature  
125  
125  
j
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may  
cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated in the  
operational sections of this specification is not implied. Exposure to absolute maxi-  
mum rating conditions for extended periods may affect reliability.  
2. Appropriate thermal calculations should be performed in all cases and specifically for  
those where the chosen package has a large thermal resistance (e.g., TSOP). The  
calculation should be of the form: T = T + P * θ where T is the ambient tempera-  
j
a
ja  
a
ture, P is average operating power and θ the thermal resistance of the package. For  
ja  
this product, use the following θ values:  
ja  
o
SOJ: 78 C/W  
o
TSOP: 112 C/W  
2
Rev. 0.0 - 4/03/98  

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