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PDM31034SA12T PDF预览

PDM31034SA12T

更新时间: 2024-01-19 17:49:34
品牌 Logo 应用领域
IXYS 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
8页 232K
描述
Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, PLASTIC, TSOP2-32

PDM31034SA12T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSOP2
包装说明:PLASTIC, TSOP2-32针数:32
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:5.27
最长访问时间:12 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32长度:20.97 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSSOP32,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.005 A最小待机电流:3 V
子类别:SRAMs最大压摆率:0.11 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

PDM31034SA12T 数据手册

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PRELIMINARY  
PDM31034  
1 Megabit 3.3V Static RAM  
128K x 8-Bit  
Revolutionary Pinout  
1
2
Description  
Features  
The PDM31034 is a high-performance CMOS static  
RAM organized as 131,072 x 8 bits. Writing is  
accomplished when the write enable (WE) and the  
chip enable (CE) inputs are both LOW. Reading is  
accomplished when WE remains HIGH and CE and  
OE are both LOW.  
High-speed access times  
Com’l: 9, 10, 12, 15 and 20 ns  
Ind’l.: 12, 15 and 20 ns  
Automotive: 15 and 20 ns  
Low power operation (typical)  
- PDM31034SA  
3
The PDM31034 operates from a single +3.3V power  
supply and all the inputs and outputs are fully TTL-  
compatible.  
Active: 200 mW  
Standby: 15 mW  
Single +3.3V (±0.3V) power supply  
TTL-compatible inputs and outputs  
Packages  
4
The PDM31034 is available in a 32-pin 400 mil plas-  
tic SOJ and 300 mil plastic SOJ, and a 32-pin plastic  
TSOP (II) package in revolutionary pinout.  
Plastic SOJ (400 mil) - SO  
Plastic SOJ (300 mil) - TSO  
Plastic TSOP (II) - T  
5
6
Functional Block Diagram  
7
A8  
A0  
Memory  
Array  
512 x 256 x 8  
Row  
Address  
Buffer  
Row  
Decoder  
Addresses  
8
(1,048,576)  
I/O0  
I/O7  
9
Input  
Data  
Control  
Column I/O  
Column Decoder  
10  
11  
12  
Column Address  
Buffer  
A16  
A9  
CE  
Control  
WE  
OE  
Rev. 1.3  
1

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