Datasheet > PDM31096

PDM31096

更新时间： 2022-12-02 23:58:34

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
8页	237K
描述
4 Megabit 3.3V Static RAM 512K x 8-Bit

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PDM31096 数据手册

PDM31096

PRELIMINARY

4 Megabit 3.3V Static RAM

512K x 8-Bit

Features

Description

■ High-speed access times

Com’l: 8, 10, 12, 15, and 20 ns

Ind’l.: 12, 15 and 20 ns

The PDM31096 is a high-performance CMOS static

RAM organized as 524,288 x 8 bits. Writing is

accomplished when the write enable (WE) and chip

enable CE inputs are both LOW. Reading is

accomplished when WE remains HIGH and CE and

OE are both LOW.

■ Low power operation

- PDM31096SA

Active: 300 mA (Max)

Standby: 25mW

The PDM31096 operates from a single +3.3V power

supply and all the inputs and outputs are fully TTL-

compatible.

■ Single +3.3V (±0.3V) power supply

■ TTL-compatible inputs and outputs

■ Packages

The PDM31096 is available in a 36-pin 400-mil plas-

tic SOJ package and a 44-pin plastic TSOP (II)

package.

Plastic SOJ (400 mil) - SO

Plastic TSOP (II) - T

Functional Block Diagram

A₀

•

Decoder

Memory

Matrix

•

Addresses

•

A₁₈

• • • • •

I/O₀

Input

Data

Control

Column I/O

•

I/O₇

•

Rev. 2.4 - 5/27/98

12 3 4 5 6 7 8

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