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PDI1284P11DGG,518 PDF预览

PDI1284P11DGG,518

更新时间: 2024-11-20 19:51:55
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管接口集成电路
页数 文件大小 规格书
16页 89K
描述
IC 13 LINE TRANSCEIVER, PDSO48, PLASTIC, TSSOP2-48, Line Driver or Receiver

PDI1284P11DGG,518 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:PLASTIC, TSSOP2-48针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.15
其他特性:6 ADDITIONAL BUFFER/DRIVER差分输出:NO
驱动器位数:14输入特性:SCHMITT TRIGGER
接口集成电路类型:LINE TRANSCEIVER接口标准:IEEE 1284
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:12.5 mm湿度敏感等级:1
功能数量:13端子数量:48
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
最大接收延迟:20 ns接收器位数:13
座面最大高度:1.2 mm最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
电源电压1-最大:5.5 V电源电压1-分钟:3 V
电源电压1-Nom:5 V表面贴装:YES
温度等级:COMMERCIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
最大传输延迟:20 ns宽度:6.1 mm
Base Number Matches:1

PDI1284P11DGG,518 数据手册

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PDI1284P11  
3.3 V parallel interface transceiver/buffer  
Rev. 03 — 25 August 2008  
Product data sheet  
1. General description  
The PDI1284P11 parallel interface chip is designed to provide an asynchronous, 8-bit,  
bidirectional, parallel interface for personal computers. The PDI1284P11 includes all 19  
signal lines defined by the IEEE 1284 interface specification for Byte, Nibble, EPP, and  
ECP modes. The PDI1284P11 is designed for hosts or peripherals operating at 3.3 V to  
interface 3.3 V or 5.0 V devices.  
The eight transceiver pairs (A/B 1 to 8) allow data transmission from the A-bus to the  
B-bus, or from the B-bus to the A-bus, depending on the state of the direction pin DIR.  
The B-bus and the Y9 to Y13 lines have either totem pole or resistor pull-up outputs,  
depending on the state of the high drive enable pin HD. The A-bus has only totem pole  
style outputs. All inputs are TTL compatible with at least 400 mV of input hysteresis at  
V
CC = 3.3 V.  
2. Features  
I Asynchronous operation  
I 8-bit transceivers  
I Six additional buffer/driver lines peripheral to cable  
I Five additional control lines from cable  
I 5 V tolerant  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Latch-up current protection exceeds 500 mA per JEDEC Std 19  
I Input hysteresis  
I Low-noise operation  
I IEEE 1284 compliant level 1 and 2  
I Overvoltage protection on B/Y side for off-state  
I A side 3-state option  
I B side active or resistive pull-up option  
I Cable side supply voltage for 5 V or 3 V operation  
 
 

PDI1284P11DGG,518 替代型号

型号 品牌 替代类型 描述 数据表
PDI1284P11DGG,118 NXP

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