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PCZ33905S3EK/R2 PDF预览

PCZ33905S3EK/R2

更新时间: 2024-11-08 05:59:59
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飞思卡尔 - FREESCALE /
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91页 2517K
描述
System Basis Chip Gen2 with High Speed CAN and LIN Interface

PCZ33905S3EK/R2 数据手册

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Document Number: MC33904_5  
Rev. 3.0, 2/2010  
Freescale Semiconductor  
Advance Information  
System Basis Chip Gen2 with High  
Speed CAN and LIN Interface  
33904  
33905  
The 33904/5 is the second generation family of System Basis Chips  
which combine several features and enhance present module designs.  
The device works as an advanced power management unit for the  
MCU and additional integrated circuits such as sensors, CAN  
transceivers. It has a built-in enhanced high speed CAN interface  
(ISO11898-2 and -5), with local and bus failure diagnostics, protection,  
and fail safe operation mode. The SBC may include one or two LIN 2.1  
interfaces with LIN output pin switches. It includes up to 4 wake-up  
input pins than can also be configured as output drivers for flexibility.  
SBC CAN GEN2  
This device implements multiple Low Power modes, with very low-  
current consumption. In addition, the device is part of a family concept  
where pin compatibility, among the various devices with and without  
LIN interfaces, add versatility to module design.  
EK SUFFIX (PB-FREE)  
EK SUFFIX (PB-FREE)  
98ASA10506D  
54-PIN SOIC EP  
98ASA10556D  
32-PIN SOIC EP  
The 33904/5 also implements an innovative and advanced fail-safe  
state machine and concept solution.  
ORDERING INFORMATION  
Features  
Temperature  
Device  
Package  
• Protected 5.0V or 3.3V regulators for MCU (part number selectable)  
and additional ICs (SPI configurable) with optional external PNP  
usage to increase current capability for MCU.  
• Fully-protected embedded 5.0 V regulator for the CAN driver  
• Extremely low quiescent current in low power modes  
• Multiple under-voltage detections to address various MCU  
specifications and system operation modes (i.e. cranking)  
• Multiple wake-up sources in low power modes: CAN or LIN bus, I/O  
transition, automatic timer, SPI message, and VDD over-current  
detection.  
Range (T )  
A
PCZ33905D3EK/R2  
MCZ33905D5EK/R2  
PCZ33905S3EK/R2  
MCZ33905S5EK/R2  
PCZ33904A3EK/R2  
MCZ33904A5EK/R2  
54 SOIC EP  
-40°C to 125°C  
32 SOIC EP  
• Voltage, current and temperature protection with enhanced  
diagnostics that can be monitored by system via MUX output  
• ISO11898-5 high speed CAN interface compatibility for baud rates  
of 40 kb/s to 1.0 Mb/s. LIN 2.1 and J2602 LIN interface compatibility  
• Pb-free packaging designated by suffix code EK  
33905D  
V
BAT  
* = Optional  
(5.0 V/3.3 V)  
Q1*  
D1  
Q2  
VBAUX  
VCAUX VSUP1 VAUX VE  
VB  
VDD  
V
DD  
VSUP2  
SAFE  
DBG  
GND  
RST  
INT  
MOSI  
SCLK  
MISO  
VSENSE  
SPI  
MCU  
I/O-0  
CS  
A/D  
MUX-OUT  
I/O-1  
5V-CAN  
TXD  
CANH  
SPLIT  
RXD  
TXD-L1  
RXD-L1  
TXD-L2  
RXD-L2  
CAN Bus  
LIN Bus  
LIN Bus  
CANL  
LIN-TERM 1  
LIN-1  
LIN-TERM 2  
LIN-2  
Figure 1. 33905D Simplified Application Diagram  
* This document contains certain information on a new product.  
Specifications and information herein are subject to change without notice.  
© Freescale Semiconductor, Inc., 2010. All rights reserved.  

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