Datasheet > PCS3I623Z05AG-16-SR

PCS3I623Z05AG-16-SR

更新时间： 2023-01-02 15:35:15

品牌	Logo	应用领域
PULSECORE		光电二极管
页数	文件大小	规格书
15页	1380K
描述
Clock Generator, 50MHz, CMOS, PDSO16, 0.150 INCH, GREEN, SOIC-16

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PCS3I623Z05AG-16-SR 数据手册

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PCS3P623Z05A/B and PCS3P623Z09A/B

Select Input Decoding table for PCS3P623Z09

PLL

CLKOUT A1 - A4 CLKOUT B1 - B4 DLY_CTRL¹Output Source

Shut-Down

Three-state

Driven

Three-state

Driven

PLL

Driven

Reference

PLL

Driven

Notes: This output is driven and has an internal feedback for the PLL. The load on this output can be adjusted to change the skew between the reference and

the Output

Spread Spectrum Control and Input-Output Skew Table

Frequency (MHz)

Device

Deviation (±%)

Input-Output Skew (±T_SKEW)

PCS3P623Z05A / 09A

PCS3P623Z05B / 09B

0.125

0.25

0.125

0.25

Note: T_SKEWis measured in units of the Clock Period

Absolute Maximum Ratings

Symbol

Parameter

Rating

Unit

VDD

Supply Voltage to Ground Potential

-0.5 to +4.6

VIN

T_STG

T_s

DC Input Voltage (CLKIN)

Storage temperature

-0.5 to +7

-65 to +125

°C

Max. Soldering Temperature (10 sec)

Junction Temperature

260

150

T_J

T_DV

Static Discharge Voltage (As per JEDEC STD22- A114-B)

Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect

device reliability.

Operating Conditions

Parameter

Description

Min

3.0

Max

3.6

+85

Unit

VDD

T_A

Supply Voltage

Operating Temperature (Ambient Temperature)

Load Capacitance

-40

°C

C_L

C_IN

Input Capacitance

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