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PCK942CBD,128 PDF预览

PCK942CBD,128

更新时间: 2024-11-13 15:47:39
品牌 Logo 应用领域
恩智浦 - NXP PC驱动逻辑集成电路
页数 文件大小 规格书
11页 63K
描述
PCK942CBD

PCK942CBD,128 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.79其他特性:ALSO OPERATES AT 3.3V SUPPLY
系列:942输入调节:STANDARD
JESD-30 代码:S-PQFP-G32长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:32
实输出次数:18最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
传播延迟(tpd):2.8 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.2 ns座面最大高度:1.6 mm
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
宽度:7 mm最小 fmax:200 MHz
Base Number Matches:1

PCK942CBD,128 数据手册

 浏览型号PCK942CBD,128的Datasheet PDF文件第2页浏览型号PCK942CBD,128的Datasheet PDF文件第3页浏览型号PCK942CBD,128的Datasheet PDF文件第4页浏览型号PCK942CBD,128的Datasheet PDF文件第5页浏览型号PCK942CBD,128的Datasheet PDF文件第6页浏览型号PCK942CBD,128的Datasheet PDF文件第7页 
PCK942C  
Low voltage 1 : 18 clock distribution chip  
Rev. 01 — 15 February 2006  
Product data sheet  
1. General description  
The PCK942C is a 1 : 18 low voltage clock distribution chip with 2.5 V or 3.3 V LVCMOS  
output capabilities. The device is offered in two versions: the PCK942C has an LVCMOS  
input clock, while the PCK942P has an LVPECL input clock. The 18 outputs are 2.5 V or  
3.3 V LVCMOS compatible and feature the drive strength to drive 50 series or parallel  
terminated transmission lines. With output-to-output skews of 200 ps, the PCK942C is  
ideal as a clock distribution chip for the most demanding of synchronous systems. The  
2.5 V outputs also make the device ideal for supplying clocks for a higher performance  
Pentium II microprocessor based design.  
With a low output impedance of approximately 12 , in both the HIGH and LOW logic  
states, the output buffers of the PCK942C are ideal for driving series terminated  
transmission lines. With an output impedance of 12 the PCK942C can drive two series  
terminated transmission lines from each output. This capability gives the PCK942C an  
effective fan-out of 1 : 36. The PCK942C provides enough copies of low skew clocks for  
most high performance synchronous systems.  
The LVCMOS/LVTTL input of the PCK942C provides a more standard LVCMOS interface.  
The OE pin will place the outputs into a high-impedance state. The OE pin has an internal  
pull-up resistor.  
The PCK942C is a single supply device. The VCC power pins require either 2.5 V or 3.3 V.  
The 32-lead LQFP package was chosen to optimize performance, board space, and cost  
of the device. The 32-lead LQFP package has a 7 mm × 7 mm body size with a  
conservative 0.8 mm pin spacing.  
2. Features  
LVCMOS/LVTTL clock input  
2.5 V LVCMOS outputs for Pentium II microprocessor support  
150 ps maximum targeted output-to-output skew  
Maximum output frequency of 250 MHz @ 3.3 V VCC  
32-lead LQFP packaging  
Single 3.3 V or 2.5 V supply voltage  
 
 

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