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PCI9050RDK PDF预览

PCI9050RDK

更新时间: 2024-01-27 07:01:40
品牌 Logo 应用领域
PLX /
页数 文件大小 规格书
2页 209K
描述
Bus Target Interface Chip

PCI9050RDK 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QFP, QFP160,1.2SQReach Compliance Code:compliant
风险等级:5.83JESD-30 代码:S-PQFP-G160
JESD-609代码:e0端子数量:160
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP160,1.2SQ封装形状:SQUARE
封装形式:FLATPACK电源:5 V
认证状态:Not Qualified子类别:Bus Controllers
最大压摆率:130 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:QUAD

PCI9050RDK 数据手册

 浏览型号PCI9050RDK的Datasheet PDF文件第2页 
PCI 9050  
Bus Target Interface Chip  
Overview  
Features  
I
PCI Specification 2.1  
As PCI gains momentum as the preeminent backplane standard, suppliers of  
add-in cards of all types are rushing to get PCI versions to market. Continuing  
its drive to provide single-chip PCI interfaces for every market, PLX offers  
designers its PCI 9050 Bus Target Interface Chip for low cost adapters.  
The PCI 9050 provides a compact, high performance PCI bus target (slave)  
interface for adapter boards. It enables rapid, low cost conversion of Industry  
Standard Architecture (ISA) adapters to the PCI bus. The PCI 9050 accelerates I/O  
data movements on adapter boards from ISA’s nominal bus speed of 8 MHz,  
5 Mbytes/second to PCI’s 33 MHz, 132 Mbytes/second data transfer capability.  
For designers looking for a simple and painless way to convert their ISA  
adapters, PLX offers the PCI 9050 RDK! It includes a PCI board designed with the  
PCI 9050 chip, I/O daughter card connector for standard or custom functions, a  
breadboard area, test headers, and a piggyback ISA slot that enables existing ISA  
boards to be plugged into the PCI 9050 for software and hardware implementa-  
tion. The PCI 9050RDK also includes a set of development software tools, includ-  
ing PLXMon™ for PCI bus monitoring and debug, and example serial/modem  
device drivers for Windows 95.™  
Compliant Target Interface  
Chip supporting low cost  
slave adapters  
I
Up to five local bus address  
spaces and four chip selects  
I
Bi-directional FIFO for zero  
wait-state burst operation  
I
PCI Bus transfers up to  
132 Mbytes/second  
I
Supports multiplexed and  
non-multiplexed 8-, 16-, and  
32-bit generic local buses  
I
Local bus runs asynchro-  
nously to the PCI clock  
I
Supports Big/Little Endian  
byte conversion  
I
Low power CMOS in  
160-pin PQFP package  
Direct Slave PCI Interface Chip  
Speeds the Inevitable  
Disappearance of the ISA Bus  

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