Datasheet > PCI9056-AA66BI

PCI9056-AA66BI

更新时间： 2024-02-29 21:22:02

品牌	Logo	应用领域
其他 - ETC		外围集成电路数据传输控制器 PC 时钟
页数	文件大小	规格书
4页	317K
描述
Controller Miscellaneous - Datasheet Reference

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技术参数
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PCI9056-AA66BI 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-256	Reach Compliance Code：	not_compliant
ECCN代码：	3A001.A.3	HTS代码：	8542.31.00.01
风险等级：	5.77	地址总线宽度：	32
总线兼容性：	I960; MPC850; MPC860; POWERPC 801; POWERPC 401	最大时钟频率：	66 MHz
最大数据传输速率：	264 MBps	外部数据总线宽度：	32
JESD-30 代码：	S-PBGA-B256	JESD-609代码：	e0
长度：	17 mm	端子数量：	256
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装等效代码：	BGA256,16X16,40	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	1.8 mm	子类别：	Bus Controllers
最大供电电压：	2.7 V	最小供电电压：	2.3 V
标称供电电压：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	BALL
端子节距：	1 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	17 mm
uPs/uCs/外围集成电路类型：	BUS CONTROLLER, PCI	Base Number Matches：	1

PCI9056-AA66BI 数据手册

V E R S I O N 1 . 0 2 0 0 2

PCI 9056

Connectivity

32-bit, 66MHz PCI r2.2 compliant

32-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola

■

PowerQUICC^™and Generic 32-bit, 66MHz Local Bus Designs

■

Motorola PowerQUICC and

generic 32-bit, 66MHz local bus

modes

Highest Performance 32-bit PCI Bus Mastering I/O Accelerator

for Your Embedded Applications

■

3.3V I/O, 5V tolerant bus

interfaces

■

PICMG 2.1 r2.0 Hot Swap Silicon

The PCI 9056 offers flexible connectivity and high performance I/O acceleration features

to enable leading edge PCI, CompactPCI, and embedded host designs.

Motorola^®MPC 850/860 PowerQUICC Designs

■

256-ball, 17 x 17 mm, 1.00 mm

fine pitch PBGA (FPBGA)

The PCI 9056 is the perfect match for the industry leading 32-bit communications proces-

sor, the Motorola MPC 850/860 PowerQUICC. The PCI 9056 provides a direct connection

to PowerQUICC devices, enabling high-speed 32-bit, 66MHz PCI performance utilizing

PLX’s Data Pipe Architecture™ technology.

Performance

Zero wait state burst operation

■

–

■

PCI bus bursts to 264 MB/sec

Local bus bursts to 264 MB/sec

2 DMA Channels

Generic 32-bit, 66MHz Local Bus Designs

The PCI 9056 provides direct connection to two generic industry standard interconnect

buses. Designers use these 32-bit, 66MHz buses for a myriad of high-speed devices

ranging from processors, to DSPs, to memories, to custom ASICs and FPGAs. The PCI

9056 Data Pipe Architecture technology enables high-speed, 32-bit, 66MHz PCI I/O

with those devices.

–

Block & Scatter/Gather transfers

DMA descriptor ring management

Demand Mode & EOT H/W

controls

■

–

Direct Master data transfers

Generate any PCI transaction

Move Your 32-bit Embedded Designs Up to 66MHz Operation

As PCI evolves to meet the ever increasing I/O demands of leading edge communications

systems, PLX continues to provide high performance PCI I/O acceleration solutions. Based

on the architecture of the industry-leading PCI 9054, the PCI 9056 offers a variety of

enhancements for the needs of today’s telecom, networking, and I/O adapter designs:

Read ahead and programmable

read prefetch counter

■

Direct Slave data transfers

–

Access 8-, 16-, and 32-bit local

bus devices

■

32-bit, 66MHz PCI operation

■

32-bit, 66MHz local bus operation

–

Deferred reads, deferred writes,

read ahead, posted writes, pro-

grammable read prefetch counter

■

Dynamic DMA descriptor ring management with Valid bit semaphore control

■

PICMG 2.1 r2.0 Hot Swap Silicon, including Bias Voltage, Early Power,

and Initialy Not Responding Support

Control

■

PCI Power Management r1.1 D3_COLDPower Management Event (PME) generation

I O r1.5 messaging unit

■

PCI arbiter supporting 7 external masters

■

Eight mailbox and two

doorbell registers

■

Reset and interrupt pins configurable for embedded host applications

■

JTAG boundary scan

■

PCI arbiter supports 7 external

masters

The PCI 9056 is register compatible with the PCI 9054, enabling easy software migration.

■

Host mode reset/interrupt signal

configuration

■

PCI D3_COLDPower Management

Event (PME) generation support

■

Serial EEPROM interface

■

JTAG boundary scan

12 3 4

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与PCI9056-AA66BI相关器件

型号	品牌	获取价格	描述	数据表
PCI9056-AD66BI	PLX	获取价格	Bus Controller, CMOS, PBGA256
PCI9056-BA66BI	PLX	获取价格	32-bit, 66MHz PCI Bus Mastering I/O Accelerat
PCI9056-BA66BIG	PLX	获取价格	32-bit, 66MHz PCI Bus Mastering I/O Accelerat
PCI9060	ETC	获取价格	12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS
PCI9060ES	ETC	获取价格	12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS
PCI9060SD	ETC	获取价格	12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS
PCI9080	PLX	获取价格	I2O Compatible PCI Bus Master I/O Accelerator Chip
PCI-9221	ETC	获取价格	16/32-CH 16-Bit 250/500 kS/s Multi-Function DAQ Cards with Encoder Input
PCI-9222	ETC	获取价格	16/32-CH 16-Bit 250/500 kS/s Multi-Function DAQ Cards with Encoder Input
PCI-9223	ETC	获取价格	16/32-CH 16-Bit 250/500 kS/s Multi-Function DAQ Cards with Encoder Input

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