Datasheet > PCA9571PW

PCA9571PW

更新时间： 2024-01-29 08:40:25

品牌	Logo	应用领域
恩智浦 - NXP		接口集成电路
页数	文件大小	规格书
34页	1834K
描述
SPECIALTY INTERFACE CIRCUIT

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PCA9571PW 技术参数

PCA9571

NXP Semiconductors

Remote 8-bit general purpose outputs for 1 MHz I²C-bus

4. Once the General Call address has been sent and acknowledged, the master sends

1 byte. The value of the byte must be equal to 06h.

a. The device acknowledges this value only. If the byte is not equal to 06h, the device

does not acknowledge it.

If more than 1 byte of data is sent, the device does not acknowledge any more.

5. Once the right byte has been sent and correctly acknowledged, the master sends a

STOP command to end the Software Reset sequence: the device then resets to the

default value (power-up value) and is ready to be addressed again within the specified

bus free time. If the master sends a Repeated START instead, no reset is performed.

The I²C-bus master must interpret a non-acknowledge from the device (at any time) as a

‘Software Reset Abort’. The device does not initiate a reset of its registers.

The unique sequence that initiates a Software Reset is described in Figure 9.

SWRST Call I C-bus address

SWRST data = 06h

START condition

R/W

acknowledge

from slave(s)

acknowledge

from slave(s)

PCA9571 is reset.

Registers are set to default power-up values.

002aah233

Fig 9. Software Reset sequence

PCA9571

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 22 December 2014

6 of 34

1...3 4 567 8 9...34

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型号	品牌	描述	获取价格	数据表
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PCA9574BS	NXP	8-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt	获取价格
PCA9574HK	NXP	SPECIALTY INTERFACE CIRCUIT	获取价格
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PCA9574HR	NXP	8-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt	获取价格
PCA9574PW	NXP	8-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt	获取价格