Datasheet > PCA9574PW,118

PCA9574PW,118

更新时间： 2024-09-24 15:47:35

品牌	Logo	应用领域
恩智浦 - NXP		PC 光电二极管接口集成电路
页数	文件大小	规格书
32页	157K
描述
PCA9574 - 8-bit I²C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt TSSOP 16-Pin

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

PCA9574PW,118 技术参数

是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	TSSOP	包装说明：	4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16
针数：	16	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	0.86
接口集成电路类型：	INTERFACE CIRCUIT	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e4	长度：	5 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.1 mm
最大供电电压：	3.6 V	最小供电电压：	1.1 V
标称供电电压：	2.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	NICKEL PALLADIUM GOLD	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	4.4 mm
Base Number Matches：	1

PCA9574PW,118 数据手册

PCA9574

8-bit I²C-bus and SMBus, level translating, low voltage GPIO

with reset and interrupt

Rev. 02 — 27 July 2009

Product data sheet

1. General description

The PCA9574 is a CMOS device that provides 8 bits of General Purpose parallel

Input/Output (GPIO) expansion in low voltage processor and handheld battery powered

mobile applications and was developed to enhance the NXP family of I²C-bus I/O

expanders. The improvements include lower supply current, lower operating voltage of

1.1 V to 3.6 V, dual and separate supply rails to allow voltage level translation anywhere

between 1.1 V and 3.6 V, 400 kHz clock frequency, and smaller packaging. Any of the

8 I/O ports can be conﬁgured as an input or output independent of each other and default

on start-up to inputs. I/O expanders provide a simple solution when additional I/Os are

needed while keeping interconnections to a minimum; for example in battery powered

mobile applications and clamshell devices for interfacing to sensors, push buttons,

keypad, etc. In addition to providing a ﬂexible set of GPIOs, it simpliﬁes interconnection of

a processor running at one voltage level to I/O devices operating at a different (usually

higher) voltage level. PCA9574 has built-in level shifting feature that makes these devices

extremely ﬂexible in mixed signal environments where communication between

incompatible I/Os is required. The core of PCA9574 can operate at a voltage as low as

1.1 V while the I/O bank can operate in the range 1.1 V to 3.6 V. Bus hold with

programmable on-chip pull-up or pull-down feature for I/Os is also provided.

The system master can enable the I/Os as either inputs or outputs by writing to the I/O

conﬁguration register bits. The data for each input or output is kept in the corresponding

Input or Output register. The polarity of the read register can be inverted with the Polarity

inversion register (active HIGH or active LOW operation). Either a bus-hold function or

pull-up/pull-down feature can be selected by programming corresponding registers. The

bus-hold provides a valid logic level when the I/O bus is not actively driven. When

bus-hold feature is not selected, the I/O ports can be conﬁgured to have pull-up or

pull-down by programming the pull-up/pull-down conﬁguration register.

An open-drain interrupt output pin (INT) allows monitoring of the input pins and is

asserted each time a change occurs on an input port unless that port is masked

(default = masked). A ‘GPIO All Call’ command allows programming multiple PCA9574s

at the same time even if they have different individual I²C-bus addresses. This allows

optimal code programming when more than one device needs to be programmed with the

same instruction or if all outputs need to be turned on or off at the same time. The internal

Power-On Reset (POR) or hardware reset pin (RESET) initializes the 8 I/Os as inputs,

sets the registers to their default values and initializes the device state machine. The I/O

bank is held in its default state when the logic supply (V_DD) is off.

One address select pin allows up to two PCA9574 devices to be connected with two

different addresses on the same I²C-bus.

12 3 4 5 6 7...32

中文翻译

下载PDF

PCA9574PW,118 替代型号

型号	品牌	替代类型	描述	数据表
PCA9574PW,112	NXP	功能相似	PCA9574 - 8-bit I²C-bus and SMBus, level tran

与PCA9574PW,118相关器件

型号	品牌	获取价格	描述	数据表
PCA9574PW-T	NXP	获取价格	IC,I/O PORT,8-BIT,CMOS,TSSOP,16PIN,PLASTIC
PCA9575	NXP	获取价格	16-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt
PCA9575HF	NXP	获取价格	16-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt
PCA9575HF,118	NXP	获取价格	PCA9575 - 16-bit I²C-bus and SMBus, level tra
PCA9575PW1	NXP	获取价格	16-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt
PCA9575PW1,118	NXP	获取价格	PCA9575 - 16-bit I²C-bus and SMBus, level tra
PCA9575PW2	NXP	获取价格	16-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt
PCA9575PW2,118	NXP	获取价格	PCA9575 - 16-bit I²C-bus and SMBus, level tra
PCA9600	NXP	获取价格	Dual bidirectional bus buffer
PCA9600_11	NXP	获取价格	Dual bidirectional bus buffer

与PCA9574PW,118相关文章

SK海力士量产12层HBM3E，容量高达36GB
2024-09-27

4
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
2024-09-27

8
摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

79
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

71

产品中心

服务支持

精选活动

关于我们

帮助中心

PCA9574PW,118

PCA9574PW,118 技术参数

PCA9574PW,118 数据手册

PCA9574PW,118 替代型号

与PCA9574PW,118相关器件

与PCA9574PW,118相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

PCA9574PW,118

PCA9574PW,118 技术参数

PCA9574PW,118 数据手册

PCA9574PW,118 替代型号

与PCA9574PW,118相关器件

与PCA9574PW,118相关文章

您还可以找

您在本页遇到什么问题？