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PCA9502BS,128

更新时间： 2024-02-19 12:49:45
品牌 Logo 应用领域
恩智浦 - NXP PC外围集成电路
页数 文件大小 规格书
27页 286K
描述
PCA9502 - 8-bit I/O expander with I2C-bus/SPI interface QFN 24-Pin

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PCA9502BS,128 技术参数

是否Rohs认证：符合生命周期：Active
零件包装代码：QFN包装说明：HVQCCN, LCC24,.16SQ,20
针数：24Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：1.14
Is Samacsys：N其他特性：IT ALSO OPERATES AT 3.3V SUPPLY
JESD-30 代码：S-PQCC-N24JESD-609代码：e4
长度：4 mm湿度敏感等级：1
位数：8I/O 线路数量：8
端口数量：1端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装等效代码：LCC24,.16SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：2.5/3.3 V认证状态：Not Qualified
座面最大高度：1 mm子类别：Parallel IO Port
最大供电电压：2.7 V最小供电电压：2.3 V
标称供电电压：2.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：4 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches：1

PCA9502BS,128 数据手册

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PCA9502  
NXP Semiconductors  
8-bit I/O expander with I2C-bus/SPI interface  
6. Pinning information  
6.1 Pinning  
terminal 1  
index area  
terminal 1  
index area  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
RESET  
GPIO4  
RESET  
GPIO4  
V
V
V
V
V
V
V
SS  
DD  
DD  
SS  
DD  
DD  
GPIO3  
GPIO2  
GPIO1  
GPIO0  
GPIO3  
GPIO2  
GPIO1  
GPIO0  
PCA9502BS  
PCA9502BS  
V
SS  
DD  
A0  
CS  
SI  
A1  
002aab839  
002aab840  
Transparent top view  
Transparent top view  
a. I2C-bus interface  
Fig 3. Pin configuration for HVQFN24  
b. SPI interface  
6.2 Pin description  
Table 2. Pin description  
Symbol  
RESET  
VDD  
Pin  
Type Description  
1
I
device hardware reset (active LOW)[1]  
2, 3, 11,  
22, 24  
-
power supply  
I2C/SPI  
CS/A0  
4
I
I
I2C-bus or SPI interface select. I2C-bus interface is selected if this  
pin is at logic HIGH. SPI interface is selected if this pin is at logic  
LOW.  
SPI chip select or I2C-bus device address select A0. If SPI  
configuration is selected by I2C/SPI pin, this pin is the SPI chip  
select pin (Schmitt trigger, active LOW). If I2C-bus configuration  
is selected by I2C/SPI pin, this pin along with A1 pin allows user  
to change the device’s base address.  
5
SI/A1  
SO  
6
7
I
SPI data input pin or I2C-bus device address select A1. If SPI  
configuration is selected by I2C/SPI pin, this is the SPI data input  
pin. If I2C-bus configuration is selected by I2C/SPI pin, this pin  
along with A0 pin allows user to change the device’s base  
address. To select the device address, please refer to Table 11.  
O
SPI data output pin. If SPI configuration is selected by I2C/SPI  
pin, this is a 3-stateable output pin. If I2C-bus configuration is  
selected by I2C/SPI pin, this pin function is undefined and must  
be left as n.c. (not connected).  
SCL/SCLK  
SDA  
8
9
I
I2C-bus or SPI input clock.  
I2C-bus data input/output, open-drain if I2C-bus configuration is  
selected by I2C/SPI pin. If SPI configuration is selected then this  
I/O  
pin is an undefined pin and must be connected to VSS  
.
PCA9502  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2016. All rights reserved.  
Product data sheet  
Rev. 4 — 23 February 2016  
3 of 27  
 
 
 
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