5秒后页面跳转
PCA8574ATS,112 PDF预览

PCA8574ATS,112

更新时间: 2024-01-18 06:39:39
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管外围集成电路
页数 文件大小 规格书
32页 1030K
描述
PCA8574/74A - Remote 8-bit I/O expander for I²C-bus with interrupt SSOP2 20-Pin

PCA8574ATS,112 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP2包装说明:LSSOP, SSOP20,.25
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.29
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:6.5 mm湿度敏感等级:1
位数:8I/O 线路数量:8
端口数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:SSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:2.5/5 V认证状态:Not Qualified
座面最大高度:1.5 mm子类别:Parallel IO Ports
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

PCA8574ATS,112 数据手册

 浏览型号PCA8574ATS,112的Datasheet PDF文件第8页浏览型号PCA8574ATS,112的Datasheet PDF文件第9页浏览型号PCA8574ATS,112的Datasheet PDF文件第10页浏览型号PCA8574ATS,112的Datasheet PDF文件第12页浏览型号PCA8574ATS,112的Datasheet PDF文件第13页浏览型号PCA8574ATS,112的Datasheet PDF文件第14页 
PCA8574; PCA8574A  
NXP Semiconductors  
Remote 8-bit I/O expander for I2C-bus with interrupt  
9. Characteristics of the I2C-bus  
The I2C-bus is for 2-way, 2-wire communication between different ICs or modules. The  
two wires are a serial data line (SDA) and a serial clock line (SCL). Both lines must be  
connected to a positive supply via a pull-up resistor when connected to the output stages  
of a device. Data transfer may be initiated only when the bus is not busy.  
9.1 Bit transfer  
One data bit is transferred during each clock pulse. The data on the SDA line must remain  
stable during the HIGH period of the clock pulse as changes in the data line at this time  
will be interpreted as control signals (see Figure 11).  
SDA  
SCL  
data line  
stable;  
data valid  
change  
of data  
allowed  
mba607  
Fig 11. Bit transfer  
9.1.1 START and STOP conditions  
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW  
transition of the data line while the clock is HIGH is defined as the START condition (S).  
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP  
condition (P) (see Figure 12).  
SDA  
SCL  
S
P
STOP condition  
START condition  
mba608  
Fig 12. Definition of START and STOP conditions  
9.2 System configuration  
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The  
device that controls the message is the ‘master’ and the devices which are controlled by  
the master are the ‘slaves’ (see Figure 13).  
PCA8574_PCA8574A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 3 — 3 June 2013  
11 of 32  
 
 
 
 
 
 

与PCA8574ATS,112相关器件

型号 品牌 描述 获取价格 数据表
PCA8574D NXP Remote 8-bit I/O expander for I2C-bus with interrupt

获取价格

PCA8574N NXP Remote 8-bit I/O expander for I2C-bus with interrupt

获取价格

PCA8574N,112 NXP PCA8574/74A - Remote 8-bit I/O expander for I

获取价格

PCA8574PW NXP Remote 8-bit I/O expander for I2C-bus with interrupt

获取价格

PCA8574PW,112 NXP PCA8574/74A - Remote 8-bit I/O expander for I

获取价格

PCA8574TS NXP Remote 8-bit I/O expander for I2C-bus with interrupt

获取价格